
8 Jul
2010
8 Jul
'10
7:34 p.m.
I am quite unsure about the role of the RBL, too. I have assumed that the setup to access the AEMIF interface is provided only by setting the AECFG pins and the role of RBL is to copy the UBL into IRAM and start it.
However, the RBL could initialize the processor in some way I do not know before loading the UBL and then I could get further problems due to a missing or wrong initialization that I have not seen in UBL. Do you know if the RBL is responsible to some further initialization before loading the UBL ?
The RBL does some PINMUX init that is required for AEMIF
Regards, Sandeep