6 Aug
2016
6 Aug
'16
3:46 p.m.
On Sat, Aug 6, 2016 at 4:41 AM, Simon Glass sjg@chromium.org wrote:
On 5 August 2016 at 17:00, Max Filippov jcmvbkbc@gmail.com wrote:
From: Chris Zankel chris@zankel.net
The Xtensa processor architecture is a configurable, extensible, and synthesizable 32-bit RISC processor core provided by Tensilica, inc.
This is the second part of the basic architecture port, adding the 'arch/xtensa' directory and a readme file.
Signed-off-by: Chris Zankel chris@zankel.net Signed-off-by: Max Filippov jcmvbkbc@gmail.com
Reviewed-by: Simon Glass sjg@chromium.org
nit: For gd, you can use __attribute__((section(".data")))
Ok.
--
Thanks.
-- Max