Linux dts files were used for those boards that didn't already have sdhci info populated. Tamonten has their own dtsi file with common sdhci nodes (sourced from Linux).
Signed-off-by: Tom Warren twarren@nvidia.com Tested-by: Thierry Reding thierry.reding@avionic-design.de --- v2: - cleanup comments in dts files/match w/kernel files - add sdhci aliases in all dts files - use tegra20-tamonten.dtsi from the kernel for AD boards v3: - include tamonten.dtsi file directly in AD dts files - fix Seaboard power-gpios flags - add cd-gpios for Colibri T20 Iris - add include paths to DTC command v4: - move dts Makefile change to separate patch v5: - change /include/ to #include, allows C preprocessor to find files v6: - change ARCH_CPU_DTS to "tegra20.dtsi" - change cd-gpios flags to 1, active-low
arch/arm/dts/tegra20.dtsi | 16 ++++++++++++---- board/avionic-design/dts/tegra20-medcom-wide.dts | 1 + board/avionic-design/dts/tegra20-plutux.dts | 1 + board/avionic-design/dts/tegra20-tec.dts | 1 + board/compal/dts/tegra20-paz00.dts | 21 ++++++++++++++++++--- board/compulab/dts/tegra20-trimslice.dts | 16 +++++++++++++++- board/nvidia/dts/tegra114-dalmore.dts | 2 +- board/nvidia/dts/tegra20-harmony.dts | 20 +++++++++++++++++++- board/nvidia/dts/tegra20-seaboard.dts | 14 +++++++++----- board/nvidia/dts/tegra20-ventana.dts | 17 ++++++++++++++++- board/nvidia/dts/tegra20-whistler.dts | 15 ++++++++++++++- board/nvidia/dts/tegra30-cardhu.dts | 2 +- board/toradex/dts/tegra20-colibri_t20_iris.dts | 9 ++++++++- 13 files changed, 116 insertions(+), 19 deletions(-)
diff --git a/arch/arm/dts/tegra20.dtsi b/arch/arm/dts/tegra20.dtsi index d163ff8..3805750 100644 --- a/arch/arm/dts/tegra20.dtsi +++ b/arch/arm/dts/tegra20.dtsi @@ -318,24 +318,32 @@ sdhci@c8000000 { compatible = "nvidia,tegra20-sdhci"; reg = <0xc8000000 0x200>; - interrupts = < 46 >; + interrupts = <0 14 0x04>; + clocks = <&tegra_car 14>; + status = "disabled"; };
sdhci@c8000200 { compatible = "nvidia,tegra20-sdhci"; reg = <0xc8000200 0x200>; - interrupts = < 47 >; + interrupts = <0 15 0x04>; + clocks = <&tegra_car 9>; + status = "disabled"; };
sdhci@c8000400 { compatible = "nvidia,tegra20-sdhci"; reg = <0xc8000400 0x200>; - interrupts = < 51 >; + interrupts = <0 19 0x04>; + clocks = <&tegra_car 69>; + status = "disabled"; };
sdhci@c8000600 { compatible = "nvidia,tegra20-sdhci"; reg = <0xc8000600 0x200>; - interrupts = < 63 >; + interrupts = <0 31 0x04>; + clocks = <&tegra_car 15>; + status = "disabled"; }; }; diff --git a/board/avionic-design/dts/tegra20-medcom-wide.dts b/board/avionic-design/dts/tegra20-medcom-wide.dts index 2acfbc1..a9a07f9 100644 --- a/board/avionic-design/dts/tegra20-medcom-wide.dts +++ b/board/avionic-design/dts/tegra20-medcom-wide.dts @@ -8,6 +8,7 @@
aliases { usb0 = "/usb@c5008000"; + sdhci0 = "/sdhci@c8000600"; };
memory { diff --git a/board/avionic-design/dts/tegra20-plutux.dts b/board/avionic-design/dts/tegra20-plutux.dts index dba200d..20016f2 100644 --- a/board/avionic-design/dts/tegra20-plutux.dts +++ b/board/avionic-design/dts/tegra20-plutux.dts @@ -8,6 +8,7 @@
aliases { usb0 = "/usb@c5008000"; + sdhci0 = "/sdhci@c8000600"; };
memory { diff --git a/board/avionic-design/dts/tegra20-tec.dts b/board/avionic-design/dts/tegra20-tec.dts index 04e6730..1d7cf89 100644 --- a/board/avionic-design/dts/tegra20-tec.dts +++ b/board/avionic-design/dts/tegra20-tec.dts @@ -8,6 +8,7 @@
aliases { usb0 = "/usb@c5008000"; + sdhci0 = "/sdhci@c8000600"; };
memory { diff --git a/board/compal/dts/tegra20-paz00.dts b/board/compal/dts/tegra20-paz00.dts index b5580c9..780203c 100644 --- a/board/compal/dts/tegra20-paz00.dts +++ b/board/compal/dts/tegra20-paz00.dts @@ -1,13 +1,15 @@ /dts-v1/;
-#include ARCH_CPU_DTS +#include "tegra20.dtsi"
/ { - model = "Toshiba AC100 / Dynabook AZ"; - compatible = "compal,paz00", "nvidia,tegra20"; + model = "Toshiba AC100 / Dynabook AZ"; + compatible = "compal,paz00", "nvidia,tegra20";
aliases { usb0 = "/usb@c5008000"; + sdhci0 = "/sdhci@c8000600"; + sdhci1 = "/sdhci@c8000000"; };
memory { @@ -53,6 +55,19 @@ status = "disabled"; };
+ sdhci@c8000000 { + status = "okay"; + cd-gpios = <&gpio 173 1>; /* gpio PV5 */ + wp-gpios = <&gpio 57 0>; /* gpio PH1 */ + power-gpios = <&gpio 169 0>; /* gpio PV1 */ + bus-width = <4>; + }; + + sdhci@c8000600 { + status = "okay"; + bus-width = <8>; + }; + lcd_panel: panel { /* PAZ00 has 1024x600 */ clock = <54030000>; diff --git a/board/compulab/dts/tegra20-trimslice.dts b/board/compulab/dts/tegra20-trimslice.dts index 04cd121..ee31476 100644 --- a/board/compulab/dts/tegra20-trimslice.dts +++ b/board/compulab/dts/tegra20-trimslice.dts @@ -1,6 +1,6 @@ /dts-v1/;
-#include ARCH_CPU_DTS +#include "tegra20.dtsi"
/ { model = "Compulab TrimSlice board"; @@ -9,6 +9,8 @@ aliases { usb0 = "/usb@c5008000"; usb1 = "/usb@c5000000"; + sdhci0 = "/sdhci@c8000600"; + sdhci1 = "/sdhci@c8000000"; };
memory { @@ -47,4 +49,16 @@ usb@c5004000 { status = "disabled"; }; + + sdhci@c8000000 { + status = "okay"; + bus-width = <4>; + }; + + sdhci@c8000600 { + status = "okay"; + cd-gpios = <&gpio 121 1>; /* gpio PP1 */ + wp-gpios = <&gpio 122 0>; /* gpio PP2 */ + bus-width = <4>; + }; }; diff --git a/board/nvidia/dts/tegra114-dalmore.dts b/board/nvidia/dts/tegra114-dalmore.dts index a3e7863..ccac932 100644 --- a/board/nvidia/dts/tegra114-dalmore.dts +++ b/board/nvidia/dts/tegra114-dalmore.dts @@ -1,6 +1,6 @@ /dts-v1/;
-#include ARCH_CPU_DTS +#include "tegra20.dtsi"
/ { model = "NVIDIA Dalmore"; diff --git a/board/nvidia/dts/tegra20-harmony.dts b/board/nvidia/dts/tegra20-harmony.dts index 35baff0..7934e4a 100644 --- a/board/nvidia/dts/tegra20-harmony.dts +++ b/board/nvidia/dts/tegra20-harmony.dts @@ -1,6 +1,6 @@ /dts-v1/;
-#include ARCH_CPU_DTS +#include "tegra20.dtsi"
/ { model = "NVIDIA Tegra20 Harmony evaluation board"; @@ -9,6 +9,8 @@ aliases { usb0 = "/usb@c5008000"; usb1 = "/usb@c5004000"; + sdhci0 = "/sdhci@c8000600"; + sdhci1 = "/sdhci@c8000200"; };
memory { @@ -52,4 +54,20 @@ usb@c5004000 { nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */ }; + + sdhci@c8000200 { + status = "okay"; + cd-gpios = <&gpio 69 1>; /* gpio PI5 */ + wp-gpios = <&gpio 57 0>; /* gpio PH1 */ + power-gpios = <&gpio 155 0>; /* gpio PT3 */ + bus-width = <4>; + }; + + sdhci@c8000600 { + status = "okay"; + cd-gpios = <&gpio 58 1>; /* gpio PH2 */ + wp-gpios = <&gpio 59 0>; /* gpio PH3 */ + power-gpios = <&gpio 70 0>; /* gpio PI6 */ + bus-width = <8>; + }; }; diff --git a/board/nvidia/dts/tegra20-seaboard.dts b/board/nvidia/dts/tegra20-seaboard.dts index bb56820..12cb0bc 100644 --- a/board/nvidia/dts/tegra20-seaboard.dts +++ b/board/nvidia/dts/tegra20-seaboard.dts @@ -1,7 +1,7 @@ /dts-v1/;
/memreserve/ 0x1c000000 0x04000000; -#include ARCH_CPU_DTS +#include "tegra20.dtsi"
/ { model = "NVIDIA Seaboard"; @@ -12,14 +12,15 @@ };
aliases { - /* This defines the order of our USB ports */ + /* This defines the order of our ports */ usb0 = "/usb@c5008000"; usb1 = "/usb@c5000000"; - i2c0 = "/i2c@7000d000"; i2c1 = "/i2c@7000c000"; i2c2 = "/i2c@7000c400"; i2c3 = "/i2c@7000c500"; + sdhci0 = "/sdhci@c8000600"; + sdhci1 = "/sdhci@c8000400"; };
memory { @@ -156,13 +157,16 @@ };
sdhci@c8000400 { - cd-gpios = <&gpio 69 0>; /* gpio PI5 */ + status = "okay"; + cd-gpios = <&gpio 69 1>; /* gpio PI5 */ wp-gpios = <&gpio 57 0>; /* gpio PH1 */ power-gpios = <&gpio 70 0>; /* gpio PI6 */ + bus-width = <4>; };
sdhci@c8000600 { - support-8bit; + status = "okay"; + bus-width = <8>; };
lcd_panel: panel { diff --git a/board/nvidia/dts/tegra20-ventana.dts b/board/nvidia/dts/tegra20-ventana.dts index b2cf863..e1a3d1e 100644 --- a/board/nvidia/dts/tegra20-ventana.dts +++ b/board/nvidia/dts/tegra20-ventana.dts @@ -1,6 +1,6 @@ /dts-v1/;
-#include ARCH_CPU_DTS +#include "tegra20.dtsi"
/ { model = "NVIDIA Tegra20 Ventana evaluation board"; @@ -8,6 +8,8 @@
aliases { usb0 = "/usb@c5008000"; + sdhci0 = "/sdhci@c8000600"; + sdhci1 = "/sdhci@c8000400"; };
memory { @@ -41,4 +43,17 @@ usb@c5004000 { status = "disabled"; }; + + sdhci@c8000400 { + status = "okay"; + cd-gpios = <&gpio 69 1>; /* gpio PI5 */ + wp-gpios = <&gpio 57 0>; /* gpio PH1 */ + power-gpios = <&gpio 70 0>; /* gpio PI6 */ + bus-width = <4>; + }; + + sdhci@c8000600 { + status = "okay"; + bus-width = <8>; + }; }; diff --git a/board/nvidia/dts/tegra20-whistler.dts b/board/nvidia/dts/tegra20-whistler.dts index aa3761f..eb92264 100644 --- a/board/nvidia/dts/tegra20-whistler.dts +++ b/board/nvidia/dts/tegra20-whistler.dts @@ -1,6 +1,6 @@ /dts-v1/;
-#include ARCH_CPU_DTS +#include "tegra20.dtsi"
/ { model = "NVIDIA Tegra20 Whistler evaluation board"; @@ -9,6 +9,8 @@ aliases { i2c0 = "/i2c@7000d000"; usb0 = "/usb@c5008000"; + sdhci0 = "/sdhci@c8000600"; + sdhci1 = "/sdhci@c8000400"; };
memory { @@ -57,4 +59,15 @@ usb@c5004000 { status = "disabled"; }; + + sdhci@c8000400 { + status = "okay"; + wp-gpios = <&gpio 173 0>; /* gpio PV5 */ + bus-width = <8>; + }; + + sdhci@c8000600 { + status = "okay"; + bus-width = <8>; + }; }; diff --git a/board/nvidia/dts/tegra30-cardhu.dts b/board/nvidia/dts/tegra30-cardhu.dts index f7ea07a..383cdb5 100644 --- a/board/nvidia/dts/tegra30-cardhu.dts +++ b/board/nvidia/dts/tegra30-cardhu.dts @@ -1,7 +1,7 @@ /dts-v1/;
/memreserve/ 0x1c000000 0x04000000; -#include ARCH_CPU_DTS +#include "tegra20.dtsi"
/ { model = "NVIDIA Cardhu"; diff --git a/board/toradex/dts/tegra20-colibri_t20_iris.dts b/board/toradex/dts/tegra20-colibri_t20_iris.dts index d8a0328..c0e54af 100644 --- a/board/toradex/dts/tegra20-colibri_t20_iris.dts +++ b/board/toradex/dts/tegra20-colibri_t20_iris.dts @@ -1,6 +1,6 @@ /dts-v1/;
-#include ARCH_CPU_DTS +#include "tegra20.dtsi"
/ { model = "Toradex Colibri T20"; @@ -10,6 +10,7 @@ usb0 = "/usb@c5008000"; usb1 = "/usb@c5000000"; usb2 = "/usb@c5004000"; + sdhci0 = "/sdhci@c8000600"; };
usb@c5000000 { @@ -35,4 +36,10 @@ compatible = "nand-flash"; }; }; + + sdhci@c8000600 { + status = "okay"; + cd-gpios = <&gpio 23 1>; /* gpio PC7 */ + bus-width = <4>; + }; };