The Intel Firmware Support Package (FSP) requires that microcode be provided very early before the device tree can be scanned. We already support adding a pointer to the microcode data in a place where early init code can access.
However this just points into the device tree and can only point to a single lot of microcode. For boards which may have different CPU types we must support multiple microcodes and pass all of them to the FSP in one place.
This series implements this by enhancing ifdtool to remove the microcode from the device tree and place it in a single block that the FSP can use. It works without making changes to the existing microcode tool or device tree format.
Collating the microcode is selected automatically when there is more than one microcode blob in the device tree. This should make it compatible with existing boards. Future boards (that don't use FSP) may want to change this but this can be dealt with at the time.
This series include two of Bin's microcode patches, adjusted to fit this scheme.
Changes in v2: - Regenerate with microcode tool - Adjust to use separate nodes for each microcode block - Enhance ifdtool rather that changing the microcode format
Bin Meng (2): x86: baytrail: Add microcode for BayTrail-I D0 stepping x86: baytrail: Support multiple microcode copies
Simon Glass (5): x86: Correct microcode documentation x86: ifdtool: Check that U-Boot does not overlap other regions x86: ifdtool: Split microcode linking into its own function x86: ifdtool: Support collating microcode into one place x86: ifdtool: Drop microcode from the device tree when collating
Makefile | 1 + arch/x86/dts/bayleybay.dts | 6 + arch/x86/dts/microcode/m0130679901.dtsi | 3284 +++++++++++++++++++++++++++++++ arch/x86/dts/minnowmax.dts | 3 + doc/README.x86 | 4 +- tools/ifdtool.c | 238 ++- 6 files changed, 3494 insertions(+), 42 deletions(-) create mode 100644 arch/x86/dts/microcode/m0130679901.dtsi