From: Ying Zhang b40530@freescale.com
IR chip on all the boards support VID are required to be used in Intel mode. the VDD will not be adjusted while IR chip is not used in Intel mode.
Signed-off-by: Ying Zhang b40530@freescale.com --- Changed from v2: - Separate this patch from T4RDB VID support patch Changed from v1: - Not support IR chip is used in AMD mode --- board/freescale/common/vid.c | 17 ++++++++++++++++- board/freescale/common/vid.h | 4 ++++ 2 files changed, 20 insertions(+), 1 deletion(-)
diff --git a/board/freescale/common/vid.c b/board/freescale/common/vid.c index f1bed51..1ea1b88 100644 --- a/board/freescale/common/vid.c +++ b/board/freescale/common/vid.c @@ -292,7 +292,7 @@ int adjust_vdd(ulong vdd_override) (void __iomem *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); #endif u32 fusesr; - u8 vid; + u8 vid, buf; int vdd_target, vdd_current, vdd_last; int ret, i2caddress; unsigned long vdd_string_override; @@ -346,6 +346,21 @@ int adjust_vdd(ulong vdd_override) debug("VID: IR Chip found on I2C address 0x%02x\n", i2caddress); }
+ /* check IR chip work on Intel mode*/ + ret = i2c_read(i2caddress, + IR36021_INTEL_MODE_OOFSET, + 1, (void *)&buf, 1); + if (ret) { + printf("VID: failed to read IR chip mode.\n"); + ret = -1; + goto exit; + } + if ((buf & IR36021_MODE_MASK) != IR36021_INTEL_MODE) { + printf("VID: IR Chip is not used in Intel mode.\n"); + ret = -1; + goto exit; + } + /* get the voltage ID from fuse status register */ fusesr = in_be32(&gur->dcfg_fusesr); /* diff --git a/board/freescale/common/vid.h b/board/freescale/common/vid.h index a9c7bb4..9182c20 100644 --- a/board/freescale/common/vid.h +++ b/board/freescale/common/vid.h @@ -11,6 +11,10 @@ #define IR36021_LOOP1_VOUT_OFFSET 0x9A #define IR36021_MFR_ID_OFFSET 0x92 #define IR36021_MFR_ID 0x43 +#define IR36021_INTEL_MODE_OOFSET 0x14 +#define IR36021_MODE_MASK 0x20 +#define IR36021_INTEL_MODE 0x00 +#define IR36021_AMD_MODE 0x20
/* step the IR regulator in 5mV increments */ #define IR_VDD_STEP_DOWN 5