Hi Christian,
On 20.07.2016 10:22, Christian Gmeiner wrote:
Hi Jian,
I took some time to recall what I did by patching FSP:
- search in every PE32 and TE image section for binary sequence
81c9000100008908c6460e01 and change to 81c9000102008908c6460e00
In the meantime I started by patching out every access to the uart bar, with the same result as I get with your patching strategy.
- then replace them in-place
So here is the next interesting problem. During fsp_init it looks like fsp copies itself to ram (IP 0xFFFD1C6C vs 0x3F5F64E1) and here it does a busy loop :(
I don't think it's a busy loop. This Bug?: https://patchwork.ozlabs.org/patch/446555/
At what place do you do the in-place patching? I hoped to do it at init_board setup.
I mean in UEFITool select the "PE32 image section", right click "Extract body", do binary patching using your favorite hex editor, right click "Replace body".
The difference can be better understand if disassemblies are compared, eg: Disassembly of section .data: @@ -3367,9 +3367,9 @@ 25fc: 05 00 05 00 00 add $0x500,%eax 2601: 8b 08 mov (%eax),%ecx 2603: 81 e1 ff ff f8 ff and $0xfff8ffff,%ecx
- 2609: 81 c9 00 01 00 00 or $0x100,%ecx
- 2609: 81 c9 00 01 02 00 or $0x20100,%ecx
What I did here is setting BAUDSEL to SYS_25MHz.
260f: 89 08 mov %ecx,(%eax)
- 2611: c6 46 0e 01 movb $0x1,0xe(%esi)
- 2611: c6 46 0e 00 movb $0x0,0xe(%esi)
Can't recall why I did this, maybe bypassing PLL altogether?
2615: c6 46 0f 00 movb $0x0,0xf(%esi) 2619: c6 46 03 83 movb $0x83,0x3(%esi) 261d: c6 46 01 00 movb $0x0,0x1(%esi)Since I don't rely on Topcliff UART for output, the baud rate recalculation is all skipped.
The same here... I am using a pci fpga based uart.
Maybe you can try the fsp.bin I sent, to see if it runs
Since it's a bit off-topic, should we exchange information w/o ccing the list?
Best regards,
*Jian Luo DC-IA/EAH2*
Tel. +49(9352)18-4266
*Be**QIK *