
Hi
thx for first look
Gesendet: Dienstag, 08. August 2023 um 13:18 Uhr Von: "Eugen Hristev" eugen.hristev@collabora.com Hi Frank,
On 8/8/23 11:09, Frank Wunderlich wrote:
From: Frank Wunderlich frank-w@public-files.de
Add Bananapi R2 Pro board.
Signed-off-by: Frank Wunderlich frank-w@public-files.de
because iodomain is different to evb and now iodomain driver is sent as patch we need to separate between EVB and R2Pro else board can be bricked.
v2:
- drop switch-node for now as u-boot driver works differently to linux
arch/arm/dts/Makefile | 3 +- arch/arm/dts/rk3568-bpi-r2pro-u-boot.dtsi | 23 + arch/arm/dts/rk3568-bpi-r2pro.dts | 549 ++++++++++++++++++++++ configs/bpi-r2pro-rk3568_defconfig | 101 ++++ 4 files changed, 675 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/rk3568-bpi-r2pro-u-boot.dtsi create mode 100644 arch/arm/dts/rk3568-bpi-r2pro.dts create mode 100644 configs/bpi-r2pro-rk3568_defconfig
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index bd518064f35f..767bf9db39fb 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -182,7 +182,8 @@ dtb-$(CONFIG_ROCKCHIP_RK3568) += \ rk3568-nanopi-r5s.dtb \ rk3568-odroid-m1.dtb \ rk3568-radxa-e25.dtb \
- rk3568-rock-3a.dtb
rk3568-rock-3a.dtb \
rk3568-bpi-r2pro.dtb
dtb-$(CONFIG_ROCKCHIP_RK3588) += \ rk3588-edgeble-neu6a-io.dtb \
diff --git a/arch/arm/dts/rk3568-bpi-r2pro-u-boot.dtsi b/arch/arm/dts/rk3568-bpi-r2pro-u-boot.dtsi new file mode 100644 index 000000000000..382a52a28b10 --- /dev/null +++ b/arch/arm/dts/rk3568-bpi-r2pro-u-boot.dtsi @@ -0,0 +1,23 @@ +// SPDX-License-Identifier: GPL-2.0+ +/*
- (C) Copyright 2021 Rockchip Electronics Co., Ltd
- */
+#include "rk356x-u-boot.dtsi"
Isn't rk356x-u-boot.dtsi automatically included if rk356x.dtsi is included ?
afaik this -u-boot file is for SPL and i need it to boot successful. This adds nodes for DRAM and MMC needed in first boot stage.
I based this file, dts and defconfig on the EVB.
+/ {
- chosen {
stdout-path = &uart2;
u-boot,spl-boot-order = "same-as-spl", &sdmmc0, &sdhci;
- };
+};
+&sdmmc0 {
- status = "okay";
+};
+&uart2 {
- clock-frequency = <24000000>;
- bootph-pre-ram;
- status = "okay";
+}; diff --git a/arch/arm/dts/rk3568-bpi-r2pro.dts b/arch/arm/dts/rk3568-bpi-r2pro.dts new file mode 100644 index 000000000000..d99f29ab0bcb --- /dev/null +++ b/arch/arm/dts/rk3568-bpi-r2pro.dts @@ -0,0 +1,549 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/*
- Author: Frank Wunderlich frank-w@public-files.de
- */
+/dts-v1/; +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/leds/common.h> +#include <dt-bindings/pinctrl/rockchip.h> +#include "rk3568.dtsi"
... as it's included here and rk3568.dtsi includes rk356x.dtsi
yes, but this DTS is used for second stage and not taken for SPL.
diff --git a/configs/bpi-r2pro-rk3568_defconfig b/configs/bpi-r2pro-rk3568_defconfig new file mode 100644 index 000000000000..e8936261eab3 --- /dev/null +++ b/configs/bpi-r2pro-rk3568_defconfig @@ -0,0 +1,101 @@ +CONFIG_ARM=y +CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 +CONFIG_ARCH_ROCKCHIP=y +CONFIG_TEXT_BASE=0x00a00000 +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000 +CONFIG_DEFAULT_DEVICE_TREE="rk3568-bpi-r2pro" +CONFIG_ROCKCHIP_RK3568=y +CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y +CONFIG_SPL_SERIAL=y +CONFIG_SPL_STACK_R_ADDR=0x600000 +CONFIG_SPL_STACK=0x400000 +CONFIG_DEBUG_UART_BASE=0xFE660000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_SYS_LOAD_ADDR=0xc00800 +CONFIG_DEBUG_UART=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_LEGACY_IMAGE_FORMAT=y +#CONFIG_OF_SYSTEM_SETUP=y +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-bpi-r2pro" +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x4000000 +CONFIG_SPL_BSS_MAX_SIZE=0x4000 +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK_R=y +CONFIG_SPL_ATF=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_PMIC=y +CONFIG_CMD_REGULATOR=y +# CONFIG_SPL_DOS_PARTITION is not set +CONFIG_SPL_OF_CONTROL=y +CONFIG_OF_LIVE=y +CONFIG_NET=n +CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_SPL_REGMAP=y +CONFIG_SPL_SYSCON=y +CONFIG_SPL_CLK=y +CONFIG_ROCKCHIP_GPIO=y +CONFIG_ROCKCHIP_GPIO_V2=y +CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_MISC=y +CONFIG_SUPPORT_EMMC_RPMB=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_SDMA=y +CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_ETH_DESIGNWARE=y +CONFIG_GMAC_ROCKCHIP=y
I think you need the DWC_ETH_QOS here and base it on Jonas' rk3568 GMAC series
as said above the defconfig is based on EVB which i used till now, but with the iodomain-patches from Jonas i need different settings else hardware gets bricked. So to prevent users from bricking their hardware i send this board- specific defconfig/dts.
i have not yet verified network as it depends on iodomain, jonas' eth_qos driver and maybe mediatek mt7531 driver (which is currently bundled with mtk soc mac).
if needed i can drop the ethernet settings (and maybe the dt nodes) for now.
Regards,