From: Patrice Chotard patrice.chotard@st.com
Since 'commit f4fcba5c5baa ("clk: implement clk_set_defaults()")' STM32F4 family board can't boot.
Above patch calls clk_set_rate() for all nodes with assigned-clock-rates property. Clock driver for STM32F family doesn't implement .set_rate callback which make clk_set_defaults() exit on error and prevent board to boot.
Signed-off-by: Patrice Chotard patrice.chotard@st.com --- drivers/clk/clk_stm32f.c | 6 ++++++ 1 file changed, 6 insertions(+)
diff --git a/drivers/clk/clk_stm32f.c b/drivers/clk/clk_stm32f.c index 7e1963dda427..e1a5fa1fdc30 100644 --- a/drivers/clk/clk_stm32f.c +++ b/drivers/clk/clk_stm32f.c @@ -375,6 +375,11 @@ printf("saidivr = %d pllsai_rate = %ld ltdc rate = %ld \n", saidivr, pllsai_rate } }
+static ulong stm32_set_rate(struct clk *clk, ulong rate) +{ + return 0; +} + static int stm32_clk_enable(struct clk *clk) { struct stm32_clk *priv = dev_get_priv(clk->dev); @@ -502,6 +507,7 @@ static struct clk_ops stm32_clk_ops = { .of_xlate = stm32_clk_of_xlate, .enable = stm32_clk_enable, .get_rate = stm32_clk_get_rate, + .set_rate = stm32_set_rate, };
U_BOOT_DRIVER(stm32fx_clk) = {