Set up interrupts correctly so that Linux can use all devices. Use savedefconfig to regenerate the defconfig file.
Signed-off-by: Simon Glass sjg@chromium.org ---
Changes in v3: - Drop unnecessary blank lines - Add PCIe root ports from bayleybay
Changes in v2: - Use pirq_init() instead of custom code
arch/x86/dts/minnowmax.dts | 59 ++++++++++++++++++++++++++++++++++++++++++--- configs/minnowmax_defconfig | 10 ++++---- include/configs/minnowmax.h | 1 + 3 files changed, 62 insertions(+), 8 deletions(-)
diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts index 9527233..25611bb9 100644 --- a/arch/x86/dts/minnowmax.dts +++ b/arch/x86/dts/minnowmax.dts @@ -7,6 +7,7 @@ /dts-v1/;
#include <dt-bindings/gpio/x86-gpio.h> +#include <dt-bindings/interrupt-router/intel-irq.h>
/include/ "skeleton.dtsi" /include/ "serial.dtsi" @@ -117,9 +118,61 @@ #address-cells = <3>; #size-cells = <2>; u-boot,dm-pre-reloc; - ranges = <0x02000000 0x0 0xd0000000 0xd0000000 0 0x10000000 - 0x42000000 0x0 0xc0000000 0xc0000000 0 0x10000000 - 0x01000000 0x0 0x2000 0x2000 0 0xe000>; + ranges = <0x02000000 0x0 0x80000000 0x80000000 0 0x40000000 + 0x42000000 0x0 0xc0000000 0xc0000000 0 0x20000000 + 0x01000000 0x0 0x2000 0x2000 0 0xe000>; + + irq-router@1f,0 { + reg = <0x0000f800 0 0 0 0>; + compatible = "intel,irq-router"; + intel,pirq-config = "ibase"; + intel,ibase-offset = <0x50>; + intel,pirq-link = <8 8>; + intel,pirq-mask = <0xdcb0>; + intel,pirq-routing = < + /* BayTrail PCI devices */ + PCI_BDF(0x00, 0x02, 0x00) INTA PIRQA + PCI_BDF(0x00, 0x11, 0x00) INTA PIRQA + PCI_BDF(0x00, 0x12, 0x00) INTA PIRQA + PCI_BDF(0x00, 0x13, 0x00) INTA PIRQA + PCI_BDF(0x00, 0x15, 0x00) INTA PIRQA + PCI_BDF(0x00, 0x18, 0x00) INTA PIRQA + PCI_BDF(0x00, 0x18, 0x02) INTD PIRQD + PCI_BDF(0x00, 0x18, 0x06) INTD PIRQD + PCI_BDF(0x00, 0x18, 0x07) INTB PIRQB + PCI_BDF(0x00, 0x1a, 0x00) INTA PIRQA + PCI_BDF(0x00, 0x1b, 0x00) INTA PIRQA + PCI_BDF(0x00, 0x1c, 0x00) INTA PIRQA + PCI_BDF(0x00, 0x1c, 0x02) INTC PIRQC + PCI_BDF(0x00, 0x1c, 0x03) INTD PIRQD + PCI_BDF(0x00, 0x1d, 0x00) INTA PIRQA + PCI_BDF(0x00, 0x1e, 0x00) INTA PIRQA + PCI_BDF(0x00, 0x1e, 0x01) INTD PIRQD + PCI_BDF(0x00, 0x1e, 0x02) INTB PIRQB + PCI_BDF(0x00, 0x1e, 0x03) INTC PIRQC + PCI_BDF(0x00, 0x1e, 0x04) INTD PIRQD + PCI_BDF(0x00, 0x1e, 0x05) INTB PIRQB + PCI_BDF(0x00, 0x1f, 0x03) INTB PIRQB + + /* PCIe root ports downstream interrupts */ + PCI_BDF(1, 0, 0) INTA PIRQA + PCI_BDF(1, 0, 0) INTB PIRQB + PCI_BDF(1, 0, 0) INTC PIRQC + PCI_BDF(1, 0, 0) INTD PIRQD + PCI_BDF(2, 0, 0) INTA PIRQB + PCI_BDF(2, 0, 0) INTB PIRQC + PCI_BDF(2, 0, 0) INTC PIRQD + PCI_BDF(2, 0, 0) INTD PIRQA + PCI_BDF(3, 0, 0) INTA PIRQC + PCI_BDF(3, 0, 0) INTB PIRQD + PCI_BDF(3, 0, 0) INTC PIRQA + PCI_BDF(3, 0, 0) INTD PIRQB + PCI_BDF(4, 0, 0) INTA PIRQD + PCI_BDF(4, 0, 0) INTB PIRQA + PCI_BDF(4, 0, 0) INTC PIRQB + PCI_BDF(4, 0, 0) INTD PIRQC + >; + }; };
spi { diff --git a/configs/minnowmax_defconfig b/configs/minnowmax_defconfig index a67597d..9af4aa3 100644 --- a/configs/minnowmax_defconfig +++ b/configs/minnowmax_defconfig @@ -5,7 +5,8 @@ CONFIG_TARGET_MINNOWMAX=y CONFIG_HAVE_INTEL_ME=y CONFIG_SMP=y CONFIG_HAVE_VGA_BIOS=y -CONFIG_GENERATE_SFI_TABLE=y +CONFIG_GENERATE_PIRQ_TABLE=y +CONFIG_GENERATE_MP_TABLE=y CONFIG_CMD_CPU=y # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set @@ -18,13 +19,12 @@ CONFIG_OF_CONTROL=y CONFIG_CPU=y CONFIG_DM_PCI=y CONFIG_SPI_FLASH=y +CONFIG_DEBUG_UART=y +CONFIG_DEBUG_UART_BASE=0x3f8 +CONFIG_DEBUG_UART_CLOCK=1843200 CONFIG_VIDEO_VESA=y CONFIG_FRAMEBUFFER_SET_VESA_MODE=y CONFIG_FRAMEBUFFER_VESA_MODE_11A=y CONFIG_DM_RTC=y CONFIG_USE_PRIVATE_LIBGCC=y CONFIG_SYS_VSNPRINTF=y -CONFIG_DEBUG_UART=y -CONFIG_DEBUG_UART_NS16550=y -CONFIG_DEBUG_UART_BASE=0x3f8 -CONFIG_DEBUG_UART_CLOCK=1843200 diff --git a/include/configs/minnowmax.h b/include/configs/minnowmax.h index 64fa676..aeb04b9 100644 --- a/include/configs/minnowmax.h +++ b/include/configs/minnowmax.h @@ -15,6 +15,7 @@
#define CONFIG_SYS_MONITOR_LEN (1 << 20) #define CONFIG_ARCH_EARLY_INIT_R +#define CONFIG_ARCH_MISC_INIT
#define CONFIG_SMSC_LPC47M