Add a flash node to handle the NAND, including memory timings and page / block size information.
Signed-off-by: Simon Glass sjg@chromium.org --- Changes in v2: - Update NAND binding to add "nvidia," prefix
Changes in v3: - Add reg property for unit address (should be used for chip select) - Update fdt binding to make everything Nvidia-specific
board/nvidia/dts/tegra2-seaboard.dts | 16 ++++++++++++++++ 1 files changed, 16 insertions(+), 0 deletions(-)
diff --git a/board/nvidia/dts/tegra2-seaboard.dts b/board/nvidia/dts/tegra2-seaboard.dts index 08ada8c..72a5f5d 100644 --- a/board/nvidia/dts/tegra2-seaboard.dts +++ b/board/nvidia/dts/tegra2-seaboard.dts @@ -126,4 +126,20 @@ 0x00000000 0x00000000 0x00000000 0x00000000 >; }; }; + + nand-controller@70008000 { + nvidia,wp-gpios = <&gpio 59 0>; /* PH3 */ + nvidia,width = <8>; + nvidia,timing = <26 100 20 80 20 10 12 10 70>; + nand@0 { + reg = <0>; + compatible = "hynix,hy27uf4g2b", "nand-flash"; + nvidia,page-data-bytes = <2048>; + nvidia,tag-ecc-bytes = <4>; + nvidia,tag-bytes = <20>; + nvidia,data-ecc-bytes = <36>; + nvidia,skipped-spare-bytes = <4>; + nvidia,page-spare-bytes = <64>; + }; + }; };