
21 Feb
2014
21 Feb
'14
8:58 p.m.
On Mon, Feb 10, 2014 at 01:59:43PM -0800, York Sun wrote:
DDR base address has been the same from the view of core and DDR controllers. This has changed for Freescale ARM-based SoCs. Controllers setup DDR memory in a contiguous space and cores view it at separated locations.
Signed-off-by: York Sun yorksun@freescale.com
Applied to u-boot/master, thanks!
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Tom