Andre Schwarz wrote:
I don't believe anyone is currently working on getting the new ddr code to be used w/83xx. Feel free to submit patches that does this and we will review them as they are posted.
- k
After spending few hours it seems to work basically. This is what I've done :
- add mpc8xxx(ddr/libddr.a to top level Makefile for 83xx
- created mpc83xx/ddr-gen2.c and ported to meet ddr83xx_t
- created board specific ddr.c for SPD accessor and basic setup.
- created board specific ddr2_spd_eeprom_t (soldered memory)
The board config got these #defines :
#define CONFIG_FSL_DDR2 #define CONFIG_DDR_SPD #define CONFIG_NUM_DDR_CONTROLLERS 1 -> this should go into mpc83xx header #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_CHIP_SELECTS_PER_CTRL 1
Since spd_sdram.o is always build (mpc83xx/Makefile) and the code is also activated by CONFIG_SPD_EEPROM we should find a reasonable way to switch between "old" and "new" DDR code by some kind of #define.
Is this the way to go ?
Yes, it is. You will also need a per-board set of functions to answer the "configuration issues" in a way similar to the rest of the 85xx and 86xx boards.
You will have to carefully juggle the presence of the "new" and "old" simultaneously (via CONFIG_FSL_DDR2, likely) until all the 83xx boards are supported under the new mechanism.
jdl