
On Apr 6, 2005 9:27 PM, Jerry Van Baren <gerald.vanbaren@smiths-
Its a memory problem. Ultimately yes, it is a timing problem. The question is where...
- Is it your SDRAM initialization?
Yeah looks alot like it. Previously I left bank 1 disabled. See below, #define CFG_BANK1_ENABLE 0
I believe SDRAM is on 64bit mode, and schematics shows two chip selects. I've sort of wrote about this prior to this email.
- Is it a hardware/layout problem?
- Are the address line lengths close to the same length?
- Are the data line lengths close to the same length?
- Is it a termination resistor problem (missing/wrong value)?
- Is it the SDRAM itself?
Bit hard to confirm at this stage. I guess I have to do everything I can on the software side first. Hardware people are little reluctant about looking up on these things.. :P
Note that, with your printf(), you are repeatedly reading the memory at your boundary case address as well as changing the timing. You are also doing a side-effect assignment to "addr" which gets discarded on the next line. For identifying and debugging memory problems, those are bad practices.
Thanks. I knew I was doing wrong :) Just didnt know what and why. Didnt think my printf was a magic one :)
My suggestion:
for (cnt = 1; cnt < maxsize / sizeof (long); cnt <<= 1) { addr = base + cnt; /* pointer arith! */ val = *addr; *addr = save[--i]; if (val != ~cnt) {
printf("*addr %08X => %04X != %04X\n",addr,val,~cnt); size = cnt * sizeof (long); /* Restore the original data before leaving the function. */ for (cnt <<= 1; cnt < maxsize / sizeof (long); cnt <<= 1) { addr = base + cnt; *addr = save[--i]; } return (size); } }
Thanks for your input. As for now, since the mistake came from misconfiguration, I'm going to dig up on that first.