On 03.07.21 05:08, Tony Dinh wrote:
In DM Ethernet, the old "egiga0" name is no longer valid, so replace it with Ethernet PHY name from device tree.
Signed-off-by: Tony Dinh mibodhi@gmail.com
Changes in v2:
Correct copyright
board/zyxel/nsa310s/nsa310s.c | 19 ++++++++----------- 1 file changed, 8 insertions(+), 11 deletions(-)
diff --git a/board/zyxel/nsa310s/nsa310s.c b/board/zyxel/nsa310s/nsa310s.c index cd4a7723b1..41479af8e6 100644 --- a/board/zyxel/nsa310s/nsa310s.c +++ b/board/zyxel/nsa310s/nsa310s.c @@ -1,8 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /*
- Copyright (C) 2015
- Gerald Kerma dreagle@doukki.net
- Tony Dinh mibodhi@gmail.com
- Copyright (C) 2015, 2021 Tony Dinh mibodhi@gmail.com
- Copyright (C) 2015 Gerald Kerma dreagle@doukki.net
*/
#include <common.h>
@@ -81,22 +80,18 @@ int board_init(void) return 0; }
+#define PHY_ADR 1
Please read the PHY address from the DT instead. It's encoded in the "reg" property and should be able to read it from there. No need to double define this value here again.
Thanks, Stefan
#ifdef CONFIG_RESET_PHY_R void reset_phy(void) { u16 reg;
- u16 phyaddr;
- char *name = "egiga0";
u16 phyaddr = PHY_ADR;
char *name = "ethernet-controller@72000";
if (miiphy_set_current_dev(name)) return;
- /* read PHY dev address */
- if (miiphy_read(name, 0xee, 0xee, (u16 *) &phyaddr)) {
printf("could not read PHY dev address\n");return;- }
- /* set RGMII delay */ miiphy_write(name, phyaddr, MV88E1318_PGADR_REG, MV88E1318_MAC_CTRL_PG); miiphy_read(name, phyaddr, MV88E1318_MAC_CTRL_REG, ®);
@@ -131,5 +126,7 @@ void reset_phy(void) /* downshift */ miiphy_write(name, phyaddr, 0x10, 0x3860); miiphy_write(name, phyaddr, 0x0, 0x9140);
- printf("MV88E1318 PHY initialized on %s\n", name); } #endif /* CONFIG_RESET_PHY_R */
Viele Grüße, Stefan