+static struct pci_controller pcie_hose[PCIE_MAX_BUSES]; +static int pcie_num_buses;
+#define cfg_read(val, addr, type, op) *val = op((type)(addr)) +#define cfg_write(val, addr, type, op) op((type *)(addr), (val))
+#define PCIE_OP(rw, size, type, op) \ +static int \ +pcie_##rw##_config_##size(struct pci_controller *hose, \
pci_dev_t dev, int offset, type val) \+{ \
- u32 b, d, f; \
Please add empty line
- if (hose->indirect_type == INDIRECT_TYPE_NO_PCIE_LINK) \
return -1; \- b = PCI_BUS(dev); d = PCI_DEV(dev) & 0x1f; f = PCI_FUNC(dev) & 0x7; \
- b = b - hose->first_busno; \
- dev = (b << 24) | (((d << 3) | f) << 16) | (offset & 0xfff); \
- cfg_##rw(val, (u32)hose->cfg_addr + (u32)dev, type, op); \
- return 0; \
+}
+PCIE_OP(read, byte, u8 *, in_8) +PCIE_OP(read, word, u16 *, in_le16) +PCIE_OP(read, dword, u32 *, in_le32) +PCIE_OP(write, byte, u8, out_8) +PCIE_OP(write, word, u16, out_le16) +PCIE_OP(write, dword, u32, out_le32)
- static int max_bus = 0;
- unsigned int ram_sz, barl, tar;
- u16 reg16;
- int i, j;
- /* Enable pex csb bridge inbound & outbound transactions */
- out_le32(&pex->bridge.pex_csb_ctrl,
in_le32(&pex->bridge.pex_csb_ctrl) | PEX_CSB_CTRL_OBPIOE |PEX_CSB_CTRL_IBPIOE);- /* Enable bridge outbound */
- out_le32(&pex->bridge.pex_csb_obctrl, PEX_CSB_OBCTRL_PIOE |
PEX_CSB_OBCTRL_MEMWE | PEX_CSB_OBCTRL_IOWE |PEX_CSB_OBCTRL_CFGWE);- out_win = &pex->bridge.pex_outbound_win[0];
- if (bus) {
out_le32(&out_win->ar, PEX_OWAR_EN | PEX_OWAR_TYPE_CFG |CFG_PCIE2_CFG_SIZE);out_le32(&out_win->bar, CFG_PCIE2_CFG_BASE);- } else {
out_le32(&out_win->ar, PEX_OWAR_EN | PEX_OWAR_TYPE_CFG |CFG_PCIE1_CFG_SIZE);out_le32(&out_win->bar, CFG_PCIE1_CFG_BASE);- }
- out_le32(&out_win->tarl, 0);
- out_le32(&out_win->tarh, 0);
- for (i = 0; i < 2; i++, reg++) {
u32 ar;
please add empty line
if (reg->size == 0)break;hose->regions[i] = *reg;hose->region_count++;out_win = &pex->bridge.pex_outbound_win[i + 1];out_le32(&out_win->bar, reg->phys_start);out_le32(&out_win->tarl, reg->bus_start);out_le32(&out_win->tarh, 0);ar = PEX_OWAR_EN | (reg->size & PEX_OWAR_SIZE);if (reg->flags & PCI_REGION_IO)ar |= PEX_OWAR_TYPE_IO;elsear |= PEX_OWAR_TYPE_MEM;out_le32(&out_win->ar, ar);- }
- out_le32(&pex->bridge.pex_csb_ibctrl, PEX_CSB_IBCTRL_PIOE);
- printf("PCIE%d: ", bus);
- reg16 = in_le16(hose_cfg_base + PEX_LTSSM_STAT);
- if (reg16 < 0x16) {
printf("No link\n");hose->indirect_type = INDIRECT_TYPE_NO_PCIE_LINK;- } else {
printf("link\n");- }
please remove the bracket on the else
+#ifdef CONFIG_PCI_SCAN_SHOW
- printf("PCI: Bus Dev VenId DevId Class Int\n");
+#endif
- /*
* Hose scan.*/- hose->last_busno = pci_hose_scan(hose);
- max_bus = hose->last_busno + 1;
+}
- struct pex_csb_bridge bridge;
- u8 res12[0x160];
} pex83xx_t;
/* diff --git a/include/asm-ppc/mpc83xx_pcie.h b/include/asm-ppc/mpc83xx_pcie.h new file mode 100644 index 0000000..c621ce7 --- /dev/null +++ b/include/asm-ppc/mpc83xx_pcie.h @@ -0,0 +1,14 @@ +#ifndef __ASM_MPC83XX_PCIE +#define __ASM_MPC83XX_PCIE
+#include <pci.h>
+#ifdef CONFIG_PCIE +extern void mpc83xx_pcie_init(int num_buses, struct pci_region **reg,
int warmboot);+#else
^ Whitespace please remvoe
+static void mpc83xx_pcie_init(int num_buses, struct pci_region **reg,
int warmboot) {}
Why not create it as inline?
+#endif
+#endif /* __ASM_MPC83XX_PCIE */
Best Regards, J.