On 09/01/2015 08:11 AM, Jagan Teki wrote:
Enabled zynq qspi controller node for zc770-xm010 board.
=> sf probe 0 -- bus0 for selecting spi controller => sf probe 1 -- bus1 for selecting qspi controller
Signed-off-by: Jagan Teki jteki@openedev.com Cc: Simon Glass sjg@chromium.org Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com
arch/arm/dts/zynq-zc770-xm010.dts | 5 +++++ 1 file changed, 5 insertions(+)
diff --git a/arch/arm/dts/zynq-zc770-xm010.dts b/arch/arm/dts/zynq-zc770-xm010.dts index 680f24c..eec4c96 100644 --- a/arch/arm/dts/zynq-zc770-xm010.dts +++ b/arch/arm/dts/zynq-zc770-xm010.dts @@ -17,6 +17,7 @@ i2c0 = &i2c0; serial0 = &uart1; spi0 = &spi1;
spi1 = &qspi;
We have discussed this internally 2 weeks ago and I would prefer to have spi0 = &gspi; because then we can better handle internal commands where qspi is expected on bus 0.
Can you please switch it?
Thanks, Michal