19 Jan
2018
19 Jan
'18
1:50 a.m.
On 01/09/2018 12:45 AM, ying.zhang22455@nxp.com wrote:
From: Zhang Ying-22455 ying.zhang22455@nxp.com
The SP805-WDT module on LS1088A requires configuration of PMU's PCTBENR register to enable watchdog counter decrement and reset signal generation. The watchdog clock needs to be enabled first.
Signed-off-by: Zhang Ying-22455 ying.zhang22455@nxp.com
Applied to fsl-qoriq master. Thanks.
York