Re: [U-Boot] [PATCH v2 14/14] arm: socfpga: stratix10: Enable Stratix10 SoC build

11 Oct 2017

On Thu, Oct 5, 2017 at 8:07 AM,  chin.liang.see@intel.com wrote:
...
From: Chin Liang See chin.liang.see@intel.com
Add build support for Stratix SoC
Signed-off-by: Chin Liang See chin.liang.see@intel.com
arch/arm/Kconfig                          |   8 +-
 arch/arm/mach-socfpga/Kconfig             |  13 ++
 configs/socfpga_stratix10_defconfig       |  39 ++++++
 include/configs/socfpga_stratix10_socdk.h | 216 ++++++++++++++++++++++++++++++
 4 files changed, 273 insertions(+), 3 deletions(-)
 create mode 100644 configs/socfpga_stratix10_defconfig
 create mode 100644 include/configs/socfpga_stratix10_socdk.h

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index d6d9558..4a6b9da 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -656,21 +656,23 @@ config ARCH_SNAPDRAGON
config ARCH_SOCFPGA
        bool "Altera SOCFPGA family"

  select CPU_V7




  select CPU_V7 if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10


  select ARM64 if TARGET_SOCFPGA_STRATIX10
  select SUPPORT_SPL
  select OF_CONTROL
  select SPL_OF_CONTROL
  select DM
  select DM_SPI_FLASH
  select DM_SPI




  select ENABLE_ARM_SOC_BOOT0_HOOK




  select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
  select ARCH_EARLY_INIT_R
  select ARCH_MISC_INIT
  select SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION




  select SYS_THUMB_BUILD




  select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
  imply CMD_MTDPARTS
  imply CRC32_VERIFY
  imply FAT_WRITE


  select SPL_SEPARATE_BSS if TARGET_SOCFPGA_STRATIX10




config ARCH_SUNXI
        bool "Support sunxi (Allwinner) SoCs"
diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig
index 45e5379..03ab956 100644
--- a/arch/arm/mach-socfpga/Kconfig
+++ b/arch/arm/mach-socfpga/Kconfig
@@ -49,6 +49,12 @@ config TARGET_SOCFPGA_GEN5
        bool
        select ALTERA_SDRAM
+config TARGET_SOCFPGA_STRATIX10

  bool


  select ARMV8_MULTIENTRY


  select ARMV8_SPIN_TABLE


  select ARMV8_SET_SMPEN




choice
        prompt "Altera SOCFPGA board select"
        optional
@@ -86,6 +92,10 @@ config TARGET_SOCFPGA_SR1500
        bool "SR1500 (Cyclone V)"
        select TARGET_SOCFPGA_CYCLONE5
+config TARGET_SOCFPGA_STRATIX10_SOCDK

  bool "Intel SOCFPGA SoCDK (Stratix 10)"


  select TARGET_SOCFPGA_STRATIX10




config TARGET_SOCFPGA_TERASIC_DE0_NANO
        bool "Terasic DE0-Nano-Atlas (Cyclone V)"
        select TARGET_SOCFPGA_CYCLONE5
@@ -116,12 +126,14 @@ config SYS_BOARD
        default "sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT
        default "socrates" if TARGET_SOCFPGA_EBV_SOCRATES
        default "sr1500" if TARGET_SOCFPGA_SR1500

  default "stratix10-socdk" if TARGET_SOCFPGA_STRATIX10_SOCDK
  default "vining_fpga" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA




config SYS_VENDOR
        default "altera" if TARGET_SOCFPGA_ARRIA5_SOCDK
        default "altera" if TARGET_SOCFPGA_ARRIA10_SOCDK
        default "altera" if TARGET_SOCFPGA_CYCLONE5_SOCDK

  default "altera" if TARGET_SOCFPGA_STRATIX10_SOCDK
  default "aries" if TARGET_SOCFPGA_ARIES_MCVEVK
  default "ebv" if TARGET_SOCFPGA_EBV_SOCRATES
  default "samtec" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA



@@ -145,6 +157,7 @@ config SYS_CONFIG_NAME
        default "socfpga_sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT
        default "socfpga_socrates" if TARGET_SOCFPGA_EBV_SOCRATES
        default "socfpga_sr1500" if TARGET_SOCFPGA_SR1500

  default "socfpga_stratix10_socdk" if TARGET_SOCFPGA_STRATIX10_SOCDK
  default "socfpga_vining_fpga" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA




endif
diff --git a/configs/socfpga_stratix10_defconfig b/configs/socfpga_stratix10_defconfig
new file mode 100644
index 0000000..e5a7a69
--- /dev/null
+++ b/configs/socfpga_stratix10_defconfig
@@ -0,0 +1,39 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SOCFPGA=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL_FAT_SUPPORT=y
+CONFIG_TARGET_SOCFPGA_STRATIX10_SOCDK=y
+CONFIG_IDENT_STRING="socfpga_stratix10"
+CONFIG_DEFAULT_DEVICE_TREE="socfpga_stratix10_socdk"
+CONFIG_BOOTDELAY=5
+CONFIG_SYS_PROMPT="SOCFPGA_STRATIX10 # "
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_FAT=y
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_FS_GENERIC=y
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_SF=y
+CONFIG_SPL=y
+CONFIG_SPL_DM=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_DM_MMC=y
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_DFU_MMC=y
+CONFIG_MMC_DW=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_CADENCE_QSPI=y
+CONFIG_DM_ETH=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_SYS_NS16550=y
+CONFIG_USE_TINY_PRINTF=y
diff --git a/include/configs/socfpga_stratix10_socdk.h b/include/configs/socfpga_stratix10_socdk.h
new file mode 100644
index 0000000..0d955f8
--- /dev/null
+++ b/include/configs/socfpga_stratix10_socdk.h
@@ -0,0 +1,216 @@
+/*


Copyright (C) 2016-2017 Intel Corporation <www.intel.com>







SPDX-License-Identifier:    GPL-2.0


*/


+#ifndef __CONFIG_SOCFGPA_STRATIX10_H__
+#define __CONFIG_SOCFGPA_STRATIX10_H__



+#include <asm/arch/base_addr_s10.h>



+/*


U-Boot general configurations


*/

+#define CONFIG_SYS_TEXT_BASE           0x1000
+#define CONFIG_SYS_MONITOR_BASE                CONFIG_SYS_TEXT_BASE
+#define CONFIG_LOADADDR                        0x80000
+#define CONFIG_SYS_LOAD_ADDR           CONFIG_LOADADDR
+#define CONFIG_REMAKE_ELF
+#define CPU_RELEASE_ADDR               0x80
+#define CONFIG_SYS_CACHELINE_SIZE      64
Can you trim this file and use socfpga_common.h for alot these defines?
Dinh

    

Re: [U-Boot] [PATCH v2 14/14] arm: socfpga: stratix10: Enable Stratix10 SoC build

Dinh Nguyen

Signed-off-by: Chin Liang See chin.liang.see@intel.com