Re: [U-Boot] [PATCH v4 6/9] rockchip: video: split RK3228-specific part off from rk_hdmi

headline is wrong. it should be "rockchip: video: splitRK3288-specific part off from rk_hdmi"

On 2017年05月31日 23:59, Philipp Tomsich wrote:

To prepare for the addition of RK3399 HDMI support, the HDMI driver is refactored and broken into a chip-specific and a generic part. This change adds the internal interfaces, makes common/reusable functions externally visible and splits the RK3228 driver into a separate file.

For the probing of regulators, we reuse the infrastructure created during the VOP refactoring... i.e. we simply call into the helper function defined for the VOP.

Signed-off-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com

Version-changes: 4

• add this path (as part of breaking up the large HDMI change for the RK3399)

---

Changes in v4: None Changes in v3: None Changes in v2: None

drivers/video/rockchip/Makefile | 3 +- drivers/video/rockchip/rk3288_hdmi.c | 116 +++++++++++++++++++++++++++++++++++ drivers/video/rockchip/rk_hdmi.c | 105 +++++-------------------------- drivers/video/rockchip/rk_hdmi.h | 32 ++++++++++ 4 files changed, 166 insertions(+), 90 deletions(-) create mode 100644 drivers/video/rockchip/rk3288_hdmi.c create mode 100644 drivers/video/rockchip/rk_hdmi.h

diff --git a/drivers/video/rockchip/Makefile b/drivers/video/rockchip/Makefile index 495d5f7..65d0ed6 100644 --- a/drivers/video/rockchip/Makefile +++ b/drivers/video/rockchip/Makefile @@ -11,6 +11,7 @@ obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288_vop.o obj-$(CONFIG_ROCKCHIP_RK3399) += rk3399_vop.o obj-$(CONFIG_DISPLAY_ROCKCHIP_EDP) += rk_edp.o obj-$(CONFIG_DISPLAY_ROCKCHIP_LVDS) += rk_lvds.o -obj-$(CONFIG_DISPLAY_ROCKCHIP_HDMI) += rk_hdmi.o +obj-hdmi-$(CONFIG_ROCKCHIP_RK3288) += rk3288_hdmi.o +obj-$(CONFIG_DISPLAY_ROCKCHIP_HDMI) += rk_hdmi.o $(obj-hdmi-y) obj-$(CONFIG_DISPLAY_ROCKCHIP_MIPI) += rk_mipi.o endif diff --git a/drivers/video/rockchip/rk3288_hdmi.c b/drivers/video/rockchip/rk3288_hdmi.c new file mode 100644 index 0000000..eae0dd2 --- /dev/null +++ b/drivers/video/rockchip/rk3288_hdmi.c @@ -0,0 +1,116 @@ +/*

• • Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH
• • SPDX-License-Identifier: GPL-2.0+
• */

+#include <common.h> +#include <clk.h> +#include <display.h> +#include <dm.h> +#include <dw_hdmi.h> +#include <edid.h> +#include <regmap.h> +#include <syscon.h> +#include <asm/gpio.h> +#include <asm/io.h> +#include <asm/arch/clock.h> +#include <asm/arch/hardware.h> +#include <asm/arch/grf_rk3288.h> +#include <power/regulator.h> +#include "rk_hdmi.h"

+static int rk3288_hdmi_enable(struct udevice *dev, int panel_bpp,

• 	      const struct display_timing *edid)
  

+{

• struct rk_hdmi_priv *priv = dev_get_priv(dev);
• struct display_plat *uc_plat = dev_get_uclass_platdata(dev);
• int vop_id = uc_plat->source_id;
• struct rk3288_grf *grf = priv->grf;
• /* hdmi source select hdmi controller */
• rk_setreg(&grf->soc_con6, 1 << 15);
• /* hdmi data from vop id */
• rk_clrsetreg(&grf->soc_con6, 1 << 4, (vop_id == 1) ? (1 << 4) : 0);
• return 0;

+}

+static int rk3288_hdmi_ofdata_to_platdata(struct udevice *dev) +{

• struct rk_hdmi_priv *priv = dev_get_priv(dev);
• struct dw_hdmi *hdmi = &priv->hdmi;
• hdmi->i2c_clk_high = 0x7a;
• hdmi->i2c_clk_low = 0x8d;
• /*

• * TODO(sjg@chromium.org): The above values don't work - these
  

• * ones work better, but generate lots of errors in the data.
  

• */
  

• hdmi->i2c_clk_high = 0x0d;
• hdmi->i2c_clk_low = 0x0d;
• return rk_hdmi_ofdata_to_platdata(dev);

+}

+static int rk3288_clk_config(struct udevice *dev) +{

• struct display_plat *uc_plat = dev_get_uclass_platdata(dev);
• struct clk clk;
• int ret;
• /*

• * Configure the maximum clock to permit whatever resolution the
  

• * monitor wants
  

• */
  

• ret = clk_get_by_index(uc_plat->src_dev, 0, &clk);
• if (ret >= 0) {

• ret = clk_set_rate(&clk, 384000000);
  

• clk_free(&clk);
  

• }
• if (ret < 0) {

• debug("%s: Failed to set clock in source device '%s': ret=%d\n",
  

•       __func__, uc_plat->src_dev->name, ret);
  

• return ret;
  

• }
• return 0;

+}

+static const char * const rk3288_regulator_names[] = {

• "vcc50_hdmi"

+};

+static int rk3288_hdmi_probe(struct udevice *dev) +{

• /* Enable VOP clock for RK3288 */
• rk3288_clk_config(dev);
• /* Enable regulators required for HDMI */
• rk_hdmi_probe_regulators(dev, rk3288_regulator_names,

• 		 ARRAY_SIZE(rk3288_regulator_names));
  

• return rk_hdmi_probe(dev);

+}

+static const struct dm_display_ops rk3288_hdmi_ops = {

• .read_edid = rk_hdmi_read_edid,
• .enable = rk3288_hdmi_enable,

+};

+static const struct udevice_id rk3288_hdmi_ids[] = {

• { .compatible = "rockchip,rk3288-dw-hdmi" },
• { }

+};

+U_BOOT_DRIVER(rk3288_hdmi_rockchip) = {

• .name = "rk3288_hdmi_rockchip",
• .id = UCLASS_DISPLAY,
• .of_match = rk3288_hdmi_ids,
• .ops = &rk3288_hdmi_ops,
• .ofdata_to_platdata = rk3288_hdmi_ofdata_to_platdata,
• .probe = rk3288_hdmi_probe,
• .priv_auto_alloc_size = sizeof(struct rk_hdmi_priv),

+}; diff --git a/drivers/video/rockchip/rk_hdmi.c b/drivers/video/rockchip/rk_hdmi.c index 2af4995..25f84a7 100644 --- a/drivers/video/rockchip/rk_hdmi.c +++ b/drivers/video/rockchip/rk_hdmi.c @@ -1,4 +1,5 @@ /*

• • Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH
  • Copyright (c) 2015 Google, Inc
  • Copyright 2014 Rockchip Inc.

@@ -16,13 +17,9 @@ #include <asm/gpio.h> #include <asm/io.h> #include <asm/arch/clock.h> -#include <asm/arch/grf_rk3288.h> -#include <power/regulator.h>

-struct rk_hdmi_priv {

• struct dw_hdmi hdmi;
• struct rk3288_grf *grf;

-}; +#include <asm/arch/hardware.h> +#include "rk_hdmi.h" +#include "rk_vop.h" /* for rk_vop_probe_regulators */

static const struct hdmi_phy_config rockchip_phy_config[] = { { @@ -74,22 +71,14 @@ static const struct hdmi_mpll_config rockchip_mpll_cfg[] = { } };

-static int rk_hdmi_read_edid(struct udevice *dev, u8 *buf, int buf_size) +int rk_hdmi_read_edid(struct udevice *dev, u8 *buf, int buf_size) { struct rk_hdmi_priv *priv = dev_get_priv(dev);

return dw_hdmi_read_edid(&priv->hdmi, buf, buf_size); }

-static int rk_hdmi_enable(struct udevice *dev, int panel_bpp,

• 	  const struct display_timing *edid)
  

-{

• struct rk_hdmi_priv *priv = dev_get_priv(dev);
• return dw_hdmi_enable(&priv->hdmi, edid);

-}

-static int rk_hdmi_ofdata_to_platdata(struct udevice *dev) +int rk_hdmi_ofdata_to_platdata(struct udevice *dev) { struct rk_hdmi_priv *priv = dev_get_priv(dev); struct dw_hdmi *hdmi = &priv->hdmi; @@ -97,15 +86,9 @@ static int rk_hdmi_ofdata_to_platdata(struct udevice *dev) hdmi->ioaddr = (ulong)dev_get_addr(dev); hdmi->mpll_cfg = rockchip_mpll_cfg; hdmi->phy_cfg = rockchip_phy_config;

• hdmi->i2c_clk_high = 0x7a;
• hdmi->i2c_clk_low = 0x8d;
• /*

• * TODO(sjg@chromium.org): The above values don't work - these ones
  

• * work better, but generate lots of errors in the data.
  

• */
  

• hdmi->i2c_clk_high = 0x0d;
• hdmi->i2c_clk_low = 0x0d;

• /* hdmi->i2c_clk_{high,low} are set up by the SoC driver */
• hdmi->reg_io_width = 4; hdmi->phy_set = dw_hdmi_phy_cfg;

@@ -114,53 +97,17 @@ static int rk_hdmi_ofdata_to_platdata(struct udevice *dev) return 0; }

-static int rk_hdmi_probe(struct udevice *dev) +void rk_hdmi_probe_regulators(struct udevice *dev,

• 	      const char * const *names, int cnt)
  

+{

• rk_vop_probe_regulators(dev, names, cnt);

+}

+int rk_hdmi_probe(struct udevice *dev) {

• struct display_plat *uc_plat = dev_get_uclass_platdata(dev); struct rk_hdmi_priv *priv = dev_get_priv(dev); struct dw_hdmi *hdmi = &priv->hdmi;

• struct udevice *reg;

• struct clk clk; int ret;

• int vop_id = uc_plat->source_id;

• ret = clk_get_by_index(dev, 0, &clk);

• if (ret >= 0) {

• ret = clk_set_rate(&clk, 0);
  

• clk_free(&clk);
  

• }

• if (ret) {

• debug("%s: Failed to set hdmi clock: ret=%d\n", __func__, ret);
  

• return ret;
  

• }

• /*

• * Configure the maximum clock to permit whatever resolution the
  

• * monitor wants
  

• */
  

• ret = clk_get_by_index(uc_plat->src_dev, 0, &clk);

• if (ret >= 0) {

• ret = clk_set_rate(&clk, 384000000);
  

• clk_free(&clk);
  

• }

• if (ret < 0) {

• debug("%s: Failed to set clock in source device '%s': ret=%d\n",
  

•       __func__, uc_plat->src_dev->name, ret);
  

• return ret;
  

• }

• ret = regulator_get_by_platname("vcc50_hdmi", &reg);

• if (!ret)

• ret = regulator_set_enable(reg, true);
  

• if (ret)

• debug("%s: Cannot set regulator vcc50_hdmi\n", __func__);
  

• /* hdmi source select hdmi controller */

• rk_setreg(&priv->grf->soc_con6, 1 << 15);

• /* hdmi data from vop id */

• rk_clrsetreg(&priv->grf->soc_con6, 1 << 4,

•      (vop_id == 1) ? (1 << 4) : 0);
  
  

  ret = dw_hdmi_phy_wait_for_hpd(hdmi); if (ret < 0) {

@@ -173,23 +120,3 @@ static int rk_hdmi_probe(struct udevice *dev)

return 0; }

-static const struct dm_display_ops rk_hdmi_ops = {

• .read_edid = rk_hdmi_read_edid,
• .enable = rk_hdmi_enable,

-};

-static const struct udevice_id rk_hdmi_ids[] = {

• { .compatible = "rockchip,rk3288-dw-hdmi" },
• { }

-};

-U_BOOT_DRIVER(hdmi_rockchip) = {

• .name = "hdmi_rockchip",
• .id = UCLASS_DISPLAY,
• .of_match = rk_hdmi_ids,
• .ops = &rk_hdmi_ops,
• .ofdata_to_platdata = rk_hdmi_ofdata_to_platdata,
• .probe = rk_hdmi_probe,
• .priv_auto_alloc_size = sizeof(struct rk_hdmi_priv),

-}; diff --git a/drivers/video/rockchip/rk_hdmi.h b/drivers/video/rockchip/rk_hdmi.h new file mode 100644 index 0000000..501ed3a --- /dev/null +++ b/drivers/video/rockchip/rk_hdmi.h @@ -0,0 +1,32 @@ +/*

• • Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH
• • SPDX-License-Identifier: GPL-2.0+
• */

+#ifndef __RK_HDMI_H__ +#define __RK_HDMI_H__

+struct rkhdmi_driverdata {

• /* configuration */
• u8 i2c_clk_high;
• u8 i2c_clk_low;
• const char * const *regulator_names;
• u32 regulator_names_cnt;
• /* setters/getters */
• int (*set_input_vop)(struct udevice *dev);
• int (*clk_config)(struct udevice *dev);

+};

+struct rk_hdmi_priv {

• struct dw_hdmi hdmi;
• void *grf;

+};

+int rk_hdmi_read_edid(struct udevice *dev, u8 *buf, int buf_size); +void rk_hdmi_probe_regulators(struct udevice *dev,

• 	      const char * const *names, int cnt);
  

+int rk_hdmi_ofdata_to_platdata(struct udevice *dev); +int rk_hdmi_probe(struct udevice *dev);

+#endif