Add GPIO (generic port) controller nodes for PH1-sLD3, PH1-LD4, PH1-Pro4 and PH1-sLD8.
Signed-off-by: Masahiro Yamada yamada.masahiro@socionext.com ---
Changes in v2: - Drop "ngpio" property - Change the compatibility string
arch/arm/dts/uniphier-ph1-ld4.dtsi | 7 +++++++ arch/arm/dts/uniphier-ph1-pro4.dtsi | 7 +++++++ arch/arm/dts/uniphier-ph1-sld3.dtsi | 7 +++++++ arch/arm/dts/uniphier-ph1-sld8.dtsi | 7 +++++++ 4 files changed, 28 insertions(+)
diff --git a/arch/arm/dts/uniphier-ph1-ld4.dtsi b/arch/arm/dts/uniphier-ph1-ld4.dtsi index 39d7b24..ac4336c 100644 --- a/arch/arm/dts/uniphier-ph1-ld4.dtsi +++ b/arch/arm/dts/uniphier-ph1-ld4.dtsi @@ -71,6 +71,13 @@ clock-frequency = <36864000>; };
+ gpio: gpio@55000000 { + compatible = "socionext,ph1-ld4-gpio"; + reg = <0x55000000 0x200>; + gpio-controller; + #gpio-cells = <2>; + }; + i2c0: i2c@58400000 { compatible = "socionext,uniphier-i2c"; #address-cells = <1>; diff --git a/arch/arm/dts/uniphier-ph1-pro4.dtsi b/arch/arm/dts/uniphier-ph1-pro4.dtsi index f06906c..c70e977 100644 --- a/arch/arm/dts/uniphier-ph1-pro4.dtsi +++ b/arch/arm/dts/uniphier-ph1-pro4.dtsi @@ -78,6 +78,13 @@ clock-frequency = <73728000>; };
+ gpio: gpio@55000000 { + compatible = "socionext,ph1-pro4-gpio"; + reg = <0x55000000 0x200>; + gpio-controller; + #gpio-cells = <2>; + }; + i2c0: i2c@58780000 { compatible = "socionext,uniphier-fi2c"; #address-cells = <1>; diff --git a/arch/arm/dts/uniphier-ph1-sld3.dtsi b/arch/arm/dts/uniphier-ph1-sld3.dtsi index 2fa42a6..f378072 100644 --- a/arch/arm/dts/uniphier-ph1-sld3.dtsi +++ b/arch/arm/dts/uniphier-ph1-sld3.dtsi @@ -93,6 +93,13 @@ clock-frequency = <36864000>; };
+ gpio: gpio@55000000 { + compatible = "socionext,ph1-sld3-gpio"; + reg = <0x55000000 0x200>; + gpio-controller; + #gpio-cells = <2>; + }; + i2c0: i2c@58400000 { compatible = "socionext,uniphier-i2c"; #address-cells = <1>; diff --git a/arch/arm/dts/uniphier-ph1-sld8.dtsi b/arch/arm/dts/uniphier-ph1-sld8.dtsi index 15df50f..b208f3c 100644 --- a/arch/arm/dts/uniphier-ph1-sld8.dtsi +++ b/arch/arm/dts/uniphier-ph1-sld8.dtsi @@ -71,6 +71,13 @@ clock-frequency = <80000000>; };
+ gpio: gpio@55000000 { + compatible = "socionext,ph1-sld8-gpio"; + reg = <0x55000000 0x200>; + gpio-controller; + #gpio-cells = <2>; + }; + i2c0: i2c@58400000 { compatible = "socionext,uniphier-i2c"; #address-cells = <1>;