Add a simple sandbox test for this uclass.
Signed-off-by: Simon Glass sjg@chromium.org ---
Changes in v5: None Changes in v4: - Drop itss uclass change in Makefile (now in previous patch) - Drop sandbox defconfig change now that p2sb change is correct - Enable IRQ for sandbox64 too to avoid build error
Changes in v3: - Change the sandbox test from ITSS to IRQ
Changes in v2: None
arch/sandbox/dts/test.dts | 4 +++ configs/sandbox64_defconfig | 1 + configs/sandbox_flattree_defconfig | 1 + configs/sandbox_spl_defconfig | 1 + drivers/misc/Makefile | 1 + drivers/misc/irq_sandbox.c | 55 ++++++++++++++++++++++++++++++ test/dm/Makefile | 1 + test/dm/irq.c | 32 +++++++++++++++++ 8 files changed, 96 insertions(+) create mode 100644 drivers/misc/irq_sandbox.c create mode 100644 test/dm/irq.c
diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index 9c8c4e2709..57513a449f 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -353,6 +353,10 @@ vss-microvolts = <0>; };
+ irq { + compatible = "sandbox,irq"; + }; + lcd { u-boot,dm-pre-reloc; compatible = "sandbox,lcd-sdl"; diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig index 229e268972..5b85818eff 100644 --- a/configs/sandbox64_defconfig +++ b/configs/sandbox64_defconfig @@ -114,6 +114,7 @@ CONFIG_CROS_EC_I2C=y CONFIG_CROS_EC_LPC=y CONFIG_CROS_EC_SANDBOX=y CONFIG_CROS_EC_SPI=y +CONFIG_IRQ=y CONFIG_PWRSEQ=y CONFIG_SPL_PWRSEQ=y CONFIG_I2C_EEPROM=y diff --git a/configs/sandbox_flattree_defconfig b/configs/sandbox_flattree_defconfig index ab4d26d012..7a7731120f 100644 --- a/configs/sandbox_flattree_defconfig +++ b/configs/sandbox_flattree_defconfig @@ -100,6 +100,7 @@ CONFIG_CROS_EC_I2C=y CONFIG_CROS_EC_LPC=y CONFIG_CROS_EC_SANDBOX=y CONFIG_CROS_EC_SPI=y +CONFIG_IRQ=y CONFIG_PWRSEQ=y CONFIG_SPL_PWRSEQ=y CONFIG_I2C_EEPROM=y diff --git a/configs/sandbox_spl_defconfig b/configs/sandbox_spl_defconfig index 0dea858eda..90c0f22ad3 100644 --- a/configs/sandbox_spl_defconfig +++ b/configs/sandbox_spl_defconfig @@ -120,6 +120,7 @@ CONFIG_CROS_EC_I2C=y CONFIG_CROS_EC_LPC=y CONFIG_CROS_EC_SANDBOX=y CONFIG_CROS_EC_SPI=y +CONFIG_IRQ=y CONFIG_PWRSEQ=y CONFIG_SPL_PWRSEQ=y CONFIG_MMC_SANDBOX=y diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index 28313e4a65..d4e8638dea 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -42,6 +42,7 @@ obj-$(CONFIG_GDSYS_IOEP) += gdsys_ioep.o obj-$(CONFIG_GDSYS_RXAUI_CTRL) += gdsys_rxaui_ctrl.o obj-$(CONFIG_GDSYS_SOC) += gdsys_soc.o obj-$(CONFIG_IRQ) += irq-uclass.o +obj-$(CONFIG_SANDBOX) += irq_sandbox.o obj-$(CONFIG_$(SPL_)I2C_EEPROM) += i2c_eeprom.o obj-$(CONFIG_IHS_FPGA) += ihs_fpga.o obj-$(CONFIG_IMX8) += imx8/ diff --git a/drivers/misc/irq_sandbox.c b/drivers/misc/irq_sandbox.c new file mode 100644 index 0000000000..6dda1a4c44 --- /dev/null +++ b/drivers/misc/irq_sandbox.c @@ -0,0 +1,55 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Sandbox driver for interrupts + * + * Copyright 2019 Google LLC + */ + +#include <common.h> +#include <dm.h> +#include <irq.h> + +static int sandbox_set_polarity(struct udevice *dev, uint irq, bool active_low) +{ + if (irq > 10) + return -EINVAL; + + return 0; +} + +static int sandbox_route_pmc_gpio_gpe(struct udevice *dev, uint pmc_gpe_num) +{ + if (pmc_gpe_num > 10) + return -ENOENT; + + return pmc_gpe_num + 1; +} + +static int sandbox_snapshot_polarities(struct udevice *dev) +{ + return 0; +} + +static int sandbox_restore_polarities(struct udevice *dev) +{ + return 0; +} + +static const struct irq_ops sandbox_irq_ops = { + .route_pmc_gpio_gpe = sandbox_route_pmc_gpio_gpe, + .set_polarity = sandbox_set_polarity, + .snapshot_polarities = sandbox_snapshot_polarities, + .restore_polarities = sandbox_restore_polarities, +}; + +static const struct udevice_id sandbox_irq_ids[] = { + { .compatible = "sandbox,irq"}, + { } +}; + +U_BOOT_DRIVER(sandbox_irq_drv) = { + .name = "sandbox_irq", + .id = UCLASS_IRQ, + .of_match = sandbox_irq_ids, + .ops = &sandbox_irq_ops, +}; diff --git a/test/dm/Makefile b/test/dm/Makefile index 129ccb3b49..a268783169 100644 --- a/test/dm/Makefile +++ b/test/dm/Makefile @@ -25,6 +25,7 @@ obj-$(CONFIG_DM_GPIO) += gpio.o obj-$(CONFIG_DM_HWSPINLOCK) += hwspinlock.o obj-$(CONFIG_DM_I2C) += i2c.o obj-$(CONFIG_SOUND) += i2s.o +obj-y += irq.o obj-$(CONFIG_LED) += led.o obj-$(CONFIG_DM_MAILBOX) += mailbox.o obj-$(CONFIG_DM_MMC) += mmc.o diff --git a/test/dm/irq.c b/test/dm/irq.c new file mode 100644 index 0000000000..726189c59f --- /dev/null +++ b/test/dm/irq.c @@ -0,0 +1,32 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Test for irq uclass + * + * Copyright 2019 Google LLC + */ + +#include <common.h> +#include <dm.h> +#include <irq.h> +#include <dm/test.h> +#include <test/ut.h> + +/* Base test of the irq uclass */ +static int dm_test_irq_base(struct unit_test_state *uts) +{ + struct udevice *dev; + + ut_assertok(uclass_first_device_err(UCLASS_IRQ, &dev)); + + ut_asserteq(5, irq_route_pmc_gpio_gpe(dev, 4)); + ut_asserteq(-ENOENT, irq_route_pmc_gpio_gpe(dev, 14)); + + ut_assertok(irq_set_polarity(dev, 4, true)); + ut_asserteq(-EINVAL, irq_set_polarity(dev, 14, true)); + + ut_assertok(irq_snapshot_polarities(dev)); + ut_assertok(irq_restore_polarities(dev)); + + return 0; +} +DM_TEST(dm_test_irq_base, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);