RE: [PATCH] mx6ullevk: Enable Ethernet support

Subject: [PATCH] mx6ullevk: Enable Ethernet support

Add Ethernet support using DM_ETH.

Signed-off-by: Fabio Estevam festevam@gmail.com

Reviewed-by: Peng Fan peng.fan@nxp.com

---

board/freescale/mx6ullevk/mx6ullevk.c | 47 +++++++++++++++++++++++++++ configs/mx6ull_14x14_evk_defconfig | 8 +++++ include/configs/mx6ullevk.h | 9 +++++ 3 files changed, 64 insertions(+)

diff --git a/board/freescale/mx6ullevk/mx6ullevk.c b/board/freescale/mx6ullevk/mx6ullevk.c index e1eddbff95..3f1ecce10f 100644 --- a/board/freescale/mx6ullevk/mx6ullevk.c +++ b/board/freescale/mx6ullevk/mx6ullevk.c @@ -19,6 +19,7 @@ #include <fsl_esdhc_imx.h> #include <linux/sizes.h> #include <mmc.h> +#include <miiphy.h>

DECLARE_GLOBAL_DATA_PTR;

@@ -60,11 +61,57 @@ int board_early_init_f(void) return 0; }

+#ifdef CONFIG_FEC_MXC +static int setup_fec(int fec_id) +{

• struct iomuxc *const iomuxc_regs = (struct iomuxc

*)IOMUXC_BASE_ADDR;

• int ret;
• if (fec_id == 0) {

• /*
  

•  * Use 50MHz anatop loopback REF_CLK1 for ENET1,
  

•  * clear gpr1[13], set gpr1[17].
  

•  */
  

• clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC1_MASK,
  

• 		IOMUX_GPR1_FEC1_CLOCK_MUX1_SEL_MASK);
  

• } else {

• /*
  

•  * Use 50MHz anatop loopback REF_CLK2 for ENET2,
  

•  * clear gpr1[14], set gpr1[18].
  

•  */
  

• clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC2_MASK,
  

• 		IOMUX_GPR1_FEC2_CLOCK_MUX1_SEL_MASK);
  

• }
• ret = enable_fec_anatop_clock(fec_id, ENET_50MHZ);
• if (ret)

• return ret;
  

• enable_enet_clk(1);
• return 0;

+}

+int board_phy_config(struct phy_device *phydev) {

• phy_write(phydev, MDIO_DEVAD_NONE, 0x1f, 0x8190);
• if (phydev->drv->config)

• phydev->drv->config(phydev);
  

• return 0;

+} +#endif

int board_init(void) { /* Address of boot parameters */ gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;

+#ifdef CONFIG_FEC_MXC

• setup_fec(CONFIG_FEC_ENET_DEV);

+#endif

• return 0;

}

diff --git a/configs/mx6ull_14x14_evk_defconfig b/configs/mx6ull_14x14_evk_defconfig index 2c69d8d6de..c16ecfab49 100644 --- a/configs/mx6ull_14x14_evk_defconfig +++ b/configs/mx6ull_14x14_evk_defconfig @@ -38,9 +38,17 @@ CONFIG_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=40000000 CONFIG_SPI_FLASH_STMICRO=y +CONFIG_PHYLIB=y +CONFIG_PHY_MICREL=y +CONFIG_PHY_MICREL_KSZ8XXX=y +CONFIG_FEC_MXC=y +CONFIG_DM_ETH=y +CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_QSPI=y diff --git a/include/configs/mx6ullevk.h b/include/configs/mx6ullevk.h index 7cce911314..af335bcfff 100644 --- a/include/configs/mx6ullevk.h +++ b/include/configs/mx6ullevk.h @@ -166,4 +166,13 @@ #define FSL_QSPI_FLASH_SIZE SZ_32M #endif

+#ifdef CONFIG_CMD_NET +#define CONFIG_FEC_ENET_DEV 1 +#if (CONFIG_FEC_ENET_DEV == 0) +#define CONFIG_ETHPRIME "eth0" +#elif (CONFIG_FEC_ENET_DEV == 1) +#define CONFIG_ETHPRIME "eth1" +#endif +#endif

#endif

2.17.1