Hi Bin,
-----Original Message----- From: Bin Meng bmeng.cn@gmail.com Sent: 02 May 2020 17:59 To: Pragnesh Patel pragnesh.patel@sifive.com Cc: U-Boot Mailing List u-boot@lists.denx.de; Atish Patra atish.patra@wdc.com; Palmer Dabbelt palmerdabbelt@google.com; Paul Walmsley paul.walmsley@sifive.com; Jagan Teki jagan@amarulasolutions.com; Troy Benjegerdes troy.benjegerdes@sifive.com; Anup Patel anup.patel@wdc.com; Sagar Kadam sagar.kadam@sifive.com; Rick Chen rick@andestech.com Subject: Re: [PATCH v7 07/22] sifive: dts: fu540: Add DDR controller and phy register settings
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On Sat, May 2, 2020 at 6:08 PM Pragnesh Patel pragnesh.patel@sifive.com wrote:
Add DDR controller and phy register settings, taken from fsbl (https://github.com/sifive/freedom-u540-c000-bootloader.git)
Signed-off-by: Pragnesh Patel pragnesh.patel@sifive.com
...fu540-hifive-unleashed-a00-sdram-ddr4.dtsi | 1489 +++++++++++++++++ 1 file changed, 1489 insertions(+) create mode 100644 arch/riscv/dts/fu540-hifive-unleashed-a00-sdram-
ddr4.dtsi
diff --git a/arch/riscv/dts/fu540-hifive-unleashed-a00-sdram-ddr4.dtsi
b/arch/riscv/dts/fu540-hifive-unleashed-a00-sdram-ddr4.dtsi
new file mode 100644 index 0000000000..370c53800d --- /dev/null +++ b/arch/riscv/dts/fu540-hifive-unleashed-a00-sdram-ddr4.dtsi @@ -0,0 +1,1489 @@ +// SPDX-License-Identifier: GPL-2.0+
Should this file be dual-licensed?
Yes, will update in v8.
+/*
- (C) Copyright 2020 SiFive, Inc
- */
Tested-by: Bin Meng bmeng.cn@gmail.com