On 04/13/2011 03:25 PM, Jason Liu wrote:
Hi Jason,
Currently, Linux kernel does not do any L2 cache enable Operation.So,Keep L2 cache enabled(L2EN=1) in the u-boot before Jump to the Linux Kernel and thus L2 cache can be effectively used in Linux Kernel.
If the cache is not active in the kernel for MX5, this should be fixed in the kernel for this architecture. Normally, cache is activated inside the kernel itself, as I cann see for other architectures and other ARMV7 processors (omap)
However, if you plan to add cache support, why not add the functions to get the cache enabled in u-boot ?
+/*
- Sine we did not enable D-cache in uboot,this is the
- Dummy function for L2 ON to make build pass. please
- Check the arch/arm/cpu/armv7/cpu.c file
- */
This seems to me a workaround for a non clear problem (at least, not clear for me..) to activate the cache at the startup of the kernel. There are already processors in u-boot supporting the cache, and if we add caching functions to u-boot for i.MX5, we must implement the full support to have cache active in the bootloader.
+invalidate_dcache:
- mov pc, lr
+l2_cache_enable:
- mrc p15, 0, r0, c1, c0, 1;
No registers are saved before calling this funtion ?
Best regards, Stefano Babic