
On 25.09.2018 15:01, Gregory CLEMENT wrote:
Adding the support for 3 boards sharing common code:
- PCB120 and PCB 123 for Ocelot chip
- PCB 91 for Luton chip
Signed-off-by: Gregory CLEMENT gregory.clement@bootlin.com
board/mscc/common/board.c | 29 +++++++++++++++++++++++++++++ board/mscc/luton/Kconfig | 14 ++++++++++++++ board/mscc/luton/Makefile | 4 ++++ board/mscc/luton/luton.c | 14 ++++++++++++++ board/mscc/ocelot/Kconfig | 24 ++++++++++++++++++++++++ board/mscc/ocelot/Makefile | 5 +++++ board/mscc/ocelot/ocelot.c | 38 ++++++++++++++++++++++++++++++++++++++ 7 files changed, 128 insertions(+) create mode 100644 board/mscc/common/board.c create mode 100644 board/mscc/luton/Kconfig create mode 100644 board/mscc/luton/Makefile create mode 100644 board/mscc/luton/luton.c create mode 100644 board/mscc/ocelot/Kconfig create mode 100644 board/mscc/ocelot/Makefile create mode 100644 board/mscc/ocelot/ocelot.c
diff --git a/board/mscc/common/board.c b/board/mscc/common/board.c new file mode 100644 index 0000000000..86e7bf3353 --- /dev/null +++ b/board/mscc/common/board.c @@ -0,0 +1,29 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/*
- Copyright (c) 2018 Microsemi Corporation
- */
+#include <common.h> +#include <asm/io.h> +#include <asm/addrspace.h> +#include <asm/types.h> +#include <environment.h>
+DECLARE_GLOBAL_DATA_PTR;
+int board_early_init_r(void) +{
- u32 ctrl;
- /* Prepare SPI controller to be used in master mode */
- writel(0, REG_CFG(ICPU_SW_MODE));
- ctrl = readl(REG_CFG(ICPU_GENERAL_CTRL));
- writel((ctrl & ~ICPU_GENERAL_CTRL_IF_SI_OWNER_M) |
ICPU_GENERAL_CTRL_IF_SI_OWNER(2),
REG_CFG(ICPU_GENERAL_CTRL));
- /* Address of boot parameters */
- gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE;
- return 0;
+} diff --git a/board/mscc/luton/Kconfig b/board/mscc/luton/Kconfig new file mode 100644 index 0000000000..e1199808d5 --- /dev/null +++ b/board/mscc/luton/Kconfig @@ -0,0 +1,14 @@ +# SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+if SOC_LUTON
+config SYS_VENDOR
- default "mscc"
+config SYS_BOARD
- default "luton"
+config SYS_CONFIG_NAME
- default "luton"
+endif diff --git a/board/mscc/luton/Makefile b/board/mscc/luton/Makefile new file mode 100644 index 0000000000..98bc47ba82 --- /dev/null +++ b/board/mscc/luton/Makefile @@ -0,0 +1,4 @@ +# SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+obj-$(CONFIG_SOC_LUTON) := luton.o +obj-y += ../common/board.o diff --git a/board/mscc/luton/luton.c b/board/mscc/luton/luton.c new file mode 100644 index 0000000000..8c31bbb12a --- /dev/null +++ b/board/mscc/luton/luton.c @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/*
- Copyright (c) 2018 Microsemi Corporation
- */
+#include <common.h> +#include <asm/io.h>
+void board_debug_uart_init(void) +{
- /* too early for the pinctrl driver, so configure the UART pins here */
- writel(BIT(30)|BIT(31), REG_GCB((0x68+8*4)));
- writel(~(BIT(30)|BIT(31)), REG_GCB((0x68+9*4)));
+} diff --git a/board/mscc/ocelot/Kconfig b/board/mscc/ocelot/Kconfig new file mode 100644 index 0000000000..0804f5081d --- /dev/null +++ b/board/mscc/ocelot/Kconfig @@ -0,0 +1,24 @@ +# SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+config SYS_VENDOR
- default "mscc"
+if SOC_OCELOT
+config SYS_BOARD
- default "ocelot"
+config SYS_CONFIG_NAME
- default "ocelot"
+endif
+if SOC_LUTON
+config SYS_BOARD
- default "luton"
+config SYS_CONFIG_NAME
- default "luton"
this is already defined in board/mscc/luton/Kconfig
+endif diff --git a/board/mscc/ocelot/Makefile b/board/mscc/ocelot/Makefile new file mode 100644 index 0000000000..f6a665ca83 --- /dev/null +++ b/board/mscc/ocelot/Makefile @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+obj-$(CONFIG_SOC_OCELOT) := ocelot.o +obj-y += ../common/board.o
diff --git a/board/mscc/ocelot/ocelot.c b/board/mscc/ocelot/ocelot.c new file mode 100644 index 0000000000..971fa93d07 --- /dev/null +++ b/board/mscc/ocelot/ocelot.c @@ -0,0 +1,38 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/*
- Copyright (c) 2018 Microsemi Corporation
- */
+#include <common.h> +#include <asm/io.h> +#include <asm/addrspace.h> +#include <asm/types.h> +#include <environment.h> +#include <spi.h>
+DECLARE_GLOBAL_DATA_PTR;
+void external_cs_manage(struct udevice *dev, bool enable) +{
- u32 cs = spi_chip_select(dev);
/* IF_SI0_OWNER, select the owner of the SI interface
* Encoding: 0: SI Slave
* 1: SI Boot Master
* 2: SI Master Controller
*/
style issues like indentation and multi-line comments
if (!enable) {
writel(ICPU_SW_MODE_SW_PIN_CTRL_MODE |
ICPU_SW_MODE_SW_SPI_CS(BIT(cs)),
REG_CFG(ICPU_SW_MODE));
writel((readl(REG_CFG(ICPU_GENERAL_CTRL))
& ~ICPU_GENERAL_CTRL_IF_SI_OWNER_M) |
ICPU_GENERAL_CTRL_IF_SI_OWNER(2),
REG_CFG(ICPU_GENERAL_CTRL));
} else {
writel(0, REG_CFG(ICPU_SW_MODE));
writel((readl(REG_CFG(ICPU_GENERAL_CTRL)) &
~ICPU_GENERAL_CTRL_IF_SI_OWNER_M) |
ICPU_GENERAL_CTRL_IF_SI_OWNER(1),
REG_CFG(ICPU_GENERAL_CTRL));
}
+}