From:thomas.luo@ieee.org U-Boot1.1.6 for AS352X Port to U-boot to New ARM base SOC AS352X, support NAND flash Boot. please ref: http://www.austriamicrosystems.com/03products/products_detail/AS3525/AS3525.... Part 2.1: Br
Signed-off-by: Thomas Luothomas.luo@austriamicrosystems.com
------------------------------------------------------------------------------- diff -urN u-boot-1.1.6.org/board/as352xpb/u-boot.lds u-boot-1.1.6/board/as352xpb/u-boot.lds --- u-boot-1.1.6.org/board/as352xpb/u-boot.lds 1970-01-01 08:00:00.000000000 +0800 +++ u-boot-1.1.6/board/as352xpb/u-boot.lds 2006-11-23 16:27:49.000000000 +0800 @@ -0,0 +1,57 @@ +/* + * (C) Copyright 2002 + * Gary Jennejohn, DENX Software Engineering, gj@denx.de + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/ +OUTPUT_ARCH(arm) +ENTRY(_start) +SECTIONS +{ + . = 0x00000000; + + . = ALIGN(4); + .text : + { + cpu/arm922t/start.o (.text) + *(.text) + } + + . = ALIGN(4); + .rodata : { *(.rodata) } + + . = ALIGN(4); + .data : { *(.data) } + + . = ALIGN(4); + .got : { *(.got) } + + . = .; + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + . = ALIGN(4); + __bss_start = .; + .bss : { *(.bss) } + _end = .; +} diff -urN u-boot-1.1.6.org/common/env_nand.c u-boot-1.1.6/common/env_nand.c --- u-boot-1.1.6.org/common/env_nand.c 2006-12-01 17:49:33.000000000 +0800 +++ u-boot-1.1.6/common/env_nand.c 2006-11-30 09:35:19.000000000 +0800 @@ -162,9 +162,13 @@
if(gd->env_valid == 1) { puts ("Erasing redundant Nand..."); - if (nand_erase(&nand_info[0], - CFG_ENV_OFFSET_REDUND, CFG_ENV_SIZE)) - return 1; +#ifdef CONFIG_AS352X + if (nand_erase(&nand_info[0], CFG_ENV_OFFSET_REDUND, CFG_ENV_NAND_ERASE_SIZE)) + return 1; +#else + if (nand_erase(&nand_info[0], CFG_ENV_OFFSET_REDUND, CFG_ENV_SIZE)) + return 1; +#endif puts ("Writing to redundant Nand... "); ret = nand_write(&nand_info[0], CFG_ENV_OFFSET_REDUND, &total, (u_char*) env_ptr); @@ -192,9 +196,13 @@ int ret = 0;
puts ("Erasing Nand..."); +#ifdef CONFIG_AS352X + if (nand_erase(&nand_info[0], CFG_ENV_OFFSET, CFG_ENV_NAND_ERASE_SIZE)) + return 1; +#else if (nand_erase(&nand_info[0], CFG_ENV_OFFSET, CFG_ENV_SIZE)) return 1; - +#endif puts ("Writing to Nand... "); total = CFG_ENV_SIZE; ret = nand_write(&nand_info[0], CFG_ENV_OFFSET, &total, (u_char*)env_ptr); diff -urN u-boot-1.1.6.org/cpu/arm922t/as352x/interrupts.c u-boot-1.1.6/cpu/arm922t/as352x/interrupts.c --- u-boot-1.1.6.org/cpu/arm922t/as352x/interrupts.c 1970-01-01 08:00:00.000000000 +0800 +++ u-boot-1.1.6/cpu/arm922t/as352x/interrupts.c 2006-12-01 17:43:30.000000000 +0800 @@ -0,0 +1,196 @@ +/* +* (C) Copyright 2002 +* Sysgo Real-Time Solutions, GmbH <www.elinos.com> +* Marius Groeger mgroeger@sysgo.de +* +* (C) Copyright 2002 +* Sysgo Real-Time Solutions, GmbH <www.elinos.com> +* Alex Zuepke azu@sysgo.de +* +* (C) Copyright 2002 +* Gary Jennejohn, DENX Software Engineering, gj@denx.de +* +* See file CREDITS for list of people who contributed to this +* project. +* +* This program is free software; you can redistribute it and/or +* modify it under the terms of the GNU General Public License as +* published by the Free Software Foundation; either version 2 of +* the License, or (at your option) any later version. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +* You should have received a copy of the GNU General Public License +* along with this program; if not, write to the Free Software +* Foundation, Inc., 59 Temple Place, Suite 330, Boston, +* MA 02111-1307 USA +*/ + +#include <common.h> +#include <arm922t.h> +#include <as352x.h> + +#if defined(CONFIG_AS352X) +#define TIMER_LOAD_VAL 0xffffffff +static ulong timestamp; +static ulong lastdec; +#define CFG_TIMER_INTERVAL 1500000 +#define CFG_TIMER_RELOAD (CFG_TIMER_INTERVAL) + +int interrupt_init (void) +{ + u32 val = rreg32(CGU_REG_PERI); + + wreg32(val|CGU_TIMER1_CLOCK_ENABLE ,CGU_REG_PERI); + + /* + * Initialise to a known state (all timers off) + */ + wreg32(TIMER_CONTROL,0); + wreg32(TIMER_CONTROL,0); + + wreg32(TIMER_INTCLR,1); + wreg32(TIMER_INTCLR,1); + + wreg32(TIMER_LOAD,CFG_TIMER_RELOAD ); + wreg32(TIMER_VALUE,CFG_TIMER_RELOAD); + + wreg32(TIMER_CONTROL,TIMER_PRESCALE_1 | TIMER_ENABLE |TIMER_32_BIT ); + + reset_timer_masked(); + return (0); +} + + + +void reset_timer (void) +{ + reset_timer_masked (); +} + +ulong get_timer (ulong base) +{ + return get_timer_masked () - base; +} + +void set_timer (ulong t) +{ + timestamp = t; +} + +void udelay (unsigned long usec) +{ + ulong tmo, tmp; + + if(usec >= 1000){ /* if "big" number, spread normalization to seconds */ + tmo = usec / 1000; /* start to normalize for usec to ticks per sec */ + tmo *= CFG_HZ; /* find number of "ticks" to wait to achieve target */ + tmo /= 1000; /* finish normalize. */ + }else{ /* else small number, don't kill it prior to HZ multiply */ + tmo = usec * CFG_HZ; + tmo /= (1000*1000); + } + + tmp = get_timer (0); /* get current timestamp */ + if( (tmo + tmp + 1) < tmp ) /* if setting this fordward will roll time stamp */ + reset_timer_masked (); /* reset "advancing" timestamp to 0, set lastdec value */ + else + tmo += tmp; /* else, set advancing stamp wake up time */ + + while (get_timer_masked () < tmo)/* loop till event */ + /*NOP*/; +} + + +void reset_timer_masked (void) +{ + /* reset time */ + lastdec = rreg32(TIMER_VALUE); /* capure current decrementer value time */ + timestamp = 0; /* start "advancing" time stamp from 0 */ +} + +ulong get_timer_masked (void) +{ + ulong now = rreg32(TIMER_VALUE); /* current tick value */ + + if (lastdec >= now) { /* normal mode (non roll) */ + /* normal mode */ + timestamp += lastdec - now; /* move stamp fordward with absoulte diff ticks */ + } else { /* we have overflow of the count down timer */ + /* nts = ts + ld + (TLV - now) + * ts=old stamp, ld=time that passed before passing through -1 + * (TLV-now) amount of time after passing though -1 + * nts = new "advancing time stamp"...it could also roll and cause problems. + */ + timestamp += lastdec + TIMER_LOAD_VAL - now; + } + lastdec = now; + + return timestamp; +} + +void udelay_masked (unsigned long usec) +{ + ulong tmo; + ulong endtime; + signed long diff; + + if (usec >= 1000) { /* if "big" number, spread normalization to seconds */ + tmo = usec / 1000; /* start to normalize for usec to ticks per sec */ + tmo *= CFG_HZ; /* find number of "ticks" to wait to achieve target */ + tmo /= 1000; /* finish normalize. */ + } else { /* else small number, don't kill it prior to HZ multiply */ + tmo = usec * CFG_HZ; + tmo /= (1000*1000); + } + + endtime = get_timer_masked () + tmo; + + do { + ulong now = get_timer_masked (); + diff = endtime - now; + } while (diff >= 0); +} + +/* +* This function is derived from PowerPC code (read timebase as long long). +* On ARM it just returns the timer value. +*/ +unsigned long long get_ticks(void) +{ + return get_timer(0); +} + +/* +* This function is derived from PowerPC code (timebase clock frequency). +* On ARM it returns the number of timer ticks per second. +*/ +ulong get_tbclk (void) +{ + ulong tbclk; + tbclk = CFG_HZ; + return tbclk; +} + + +/* +* reset the cpu by setting up the watchdog timer and let him time out +*/ +void reset_cpu (ulong ignored) +{ + + /* Disable watchdog */ + + /* Initialize watchdog timer count register */ + + /* Enable watchdog timer; assert reset at timer timeout */ + + while(1); /* loop forever and wait for reset to happen */ + + /*NOTREACHED*/ +} + +#endif /* defined(CONFIG_AS352X) */ diff -urN u-boot-1.1.6.org/cpu/arm922t/as352x/Makefile u-boot-1.1.6/cpu/arm922t/as352x/Makefile --- u-boot-1.1.6.org/cpu/arm922t/as352x/Makefile 1970-01-01 08:00:00.000000000 +0800 +++ u-boot-1.1.6/cpu/arm922t/as352x/Makefile 2006-11-29 17:29:07.000000000 +0800 @@ -0,0 +1,45 @@ +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(SOC).a + +COBJS = interrupts.o serial.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) + +all: $(obj).depend $(LIB) + +$(LIB): $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff -urN u-boot-1.1.6.org/cpu/arm922t/as352x/serial.c u-boot-1.1.6/cpu/arm922t/as352x/serial.c --- u-boot-1.1.6.org/cpu/arm922t/as352x/serial.c 1970-01-01 08:00:00.000000000 +0800 +++ u-boot-1.1.6/cpu/arm922t/as352x/serial.c 2006-12-01 17:43:18.000000000 +0800 @@ -0,0 +1,145 @@ +/* +* Copyright (C) 2006 Austriamicrosystems Corporation +* +* See file CREDITS for list of people who contributed to this +* project. +* +* This program is free software; you can redistribute it and/or +* modify it under the terms of the GNU General Public License as +* published by the Free Software Foundation; either version 2 of +* the License, or (at your option) any later version. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +* You should have received a copy of the GNU General Public License +* along with this program; if not, write to the Free Software +* Foundation, Inc., 59 Temple Place, Suite 330, Boston, +* MA 02111-1307 USA +*/ + +#include <common.h> +#if defined(CONFIG_AS352X) +#include <as352x.h> + +DECLARE_GLOBAL_DATA_PTR; + +/* +* Initialise the serial port with the given baudrate. The settings +* are always 8 data bits, no parity, 1 stop bit, no start bits. +*/ +void serial_setbrg (void) +{ + u8 controlData; + set_reg_bits32(CCU_IO,CCU_IO_UART); + + /* reset the uart + */ + set_reg_bits32(CCU_SRC, CCU_SRC_UART0); + wreg32(CCU_SRL, CCU_SRL_MAGIC_NUMBER); + clr_reg_bits32(CCU_SRC, CCU_SRC_UART0); + wreg32(CCU_SRL, 0x0); + wreg32(UART_FCTL_REG, 0); + wreg32(UART_INTEN_REG, 0); + controlData = 3; + wreg32(UART_LNCTL_REG,controlData| UART_LNCTL_DLSEN); + wreg32(UART_DLO_REG,0x68); + wreg32(UART_DHI_REG,0x0); + wreg32(UART_LNCTL_REG,controlData& (~UART_LNCTL_DLSEN)); + +} +int serial_init (void) +{ + int i; + serial_setbrg(); + for (i = 0; i < 100; i++); + return (0); +} + +/* +* Read a single byte from the serial port. Returns 1 on success, 0 +* otherwise. When the function is succesfull, the character read is +* written into its argument c. +*/ +int serial_getc (void) +{ + u8 c; + + while (!(rreg32(UART_LNSTATUS_REG) & UART_RX_DATA_READY)); + c = rreg32(UART_DATA_REG); + return c&0xff; +} + +#ifdef CONFIG_HWFLOW +static int hwflow = 0; /* turned off by default */ +int hwflow_onoff(int on) +{ + switch(on) { + case 0: + default: + break; /* return current */ + case 1: + hwflow = 0; /* turn on */ + break; + case -1: + hwflow = 0; /* turn off */ + break; + } + return hwflow; +} +#endif + +#ifdef CONFIG_MODEM_SUPPORT +static int be_quiet = 0; +void disable_putc(void) +{ + be_quiet = 1; +} + +void enable_putc(void) +{ + be_quiet = 0; +} +#endif + + +/* +* Output a single byte to the serial port. +*/ +void serial_putc (const char c) +{ +#ifdef CONFIG_MODEM_SUPPORT + if (be_quiet) + return; +#endif + + /* wait for room in the tx FIFO */ + while (!(rreg32(UART_LNSTATUS_REG) & UART_TX_HOLD_REG_EMPTY)); + wreg32(UART_DATA_REG,c); + + + + /* If \n, also do \r */ + if (c == '\n') + serial_putc ('\r'); +} + +/* +* Test whether a character is in the RX buffer +*/ +int serial_tstc (void) +{ + return (rreg32(UART_LNSTATUS_REG) & UART_RX_DATA_READY); +} + +void +serial_puts (const char *s) +{ + while (*s) { + serial_putc (*s++); + } +} + +#endif /* defined(CONFIG_AS352X)*/ diff -urN u-boot-1.1.6.org/cpu/arm922t/config.mk u-boot-1.1.6/cpu/arm922t/config.mk --- u-boot-1.1.6.org/cpu/arm922t/config.mk 1970-01-01 08:00:00.000000000 +0800 +++ u-boot-1.1.6/cpu/arm922t/config.mk 2006-11-24 16:43:15.000000000 +0800 @@ -0,0 +1,34 @@ +# +# (C) Copyright 2002 +# Gary Jennejohn, DENX Software Engineering, gj@denx.de +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +PLATFORM_RELFLAGS += -fno-strict-aliasing -fno-common -ffixed-r8 \ + + +PLATFORM_CPPFLAGS += -march=armv4 +# ========================================================================= +# +# Supply options according to compiler version +# +# ========================================================================= +PLATFORM_CPPFLAGS +=$(call cc-option,-mapcs-32,-mabi=apcs-gnu) +PLATFORM_RELFLAGS +=$(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) diff -urN u-boot-1.1.6.org/cpu/arm922t/cpu.c u-boot-1.1.6/cpu/arm922t/cpu.c --- u-boot-1.1.6.org/cpu/arm922t/cpu.c 1970-01-01 08:00:00.000000000 +0800 +++ u-boot-1.1.6/cpu/arm922t/cpu.c 2006-12-01 17:43:54.000000000 +0800 @@ -0,0 +1,185 @@ +/* +* (C) Copyright 2002 +* Sysgo Real-Time Solutions, GmbH <www.elinos.com> +* Marius Groeger mgroeger@sysgo.de +* +* (C) Copyright 2002 +* Gary Jennejohn, DENX Software Engineering, gj@denx.de +* +* See file CREDITS for list of people who contributed to this +* project. +* +* This program is free software; you can redistribute it and/or +* modify it under the terms of the GNU General Public License as +* published by the Free Software Foundation; either version 2 of +* the License, or (at your option) any later version. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +* You should have received a copy of the GNU General Public License +* along with this program; if not, write to the Free Software +* Foundation, Inc., 59 Temple Place, Suite 330, Boston, +* MA 02111-1307 USA +*/ + +/* +* CPU specific code +*/ + +#include <common.h> +#include <command.h> +#include <arm922t.h> + +#ifdef CONFIG_USE_IRQ +DECLARE_GLOBAL_DATA_PTR; +#endif + +/* read co-processor 15, register #1 (control register) */ +static unsigned long read_p15_c1 (void) +{ + unsigned long value; + + __asm__ __volatile__( + "mrc p15, 0, %0, c1, c0, 0 @ read control reg\n" + : "=r" (value) + : + : "memory"); + +#ifdef MMU_DEBUG + printf ("p15/c1 is = %08lx\n", value); +#endif + return value; +} + +/* write to co-processor 15, register #1 (control register) */ +static void write_p15_c1 (unsigned long value) +{ +#ifdef MMU_DEBUG + printf ("write %08lx to p15/c1\n", value); +#endif + __asm__ __volatile__( + "mcr p15, 0, %0, c1, c0, 0 @ write it back\n" + : + : "r" (value) + : "memory"); + + read_p15_c1 (); +} + +static void cp_delay (void) +{ + volatile int i; + + /* copro seems to need some delay between reading and writing */ + for (i = 0; i < 100; i++); +} + +/* See also ARM920T Technical reference Manual */ +#define C1_MMU (1<<0) /* mmu off/on */ +#define C1_ALIGN (1<<1) /* alignment faults off/on */ +#define C1_DC (1<<2) /* dcache off/on */ + +#define C1_BIG_ENDIAN (1<<7) /* big endian off/on */ +#define C1_SYS_PROT (1<<8) /* system protection */ +#define C1_ROM_PROT (1<<9) /* ROM protection */ +#define C1_IC (1<<12) /* icache off/on */ +#define C1_HIGH_VECTORS (1<<13) /* location of vectors: low/high addresses */ + + +int cpu_init (void) +{ + /* + * setup up stacks if necessary + */ +#ifdef CONFIG_USE_IRQ + IRQ_STACK_START = _armboot_start - CFG_MALLOC_LEN - CFG_GBL_DATA_SIZE - 4; + FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ; +#endif + return 0; +} + +int cleanup_before_linux (void) +{ + /* + * this function is called just before we call linux + * it prepares the processor for linux + * + * we turn off caches etc ... + */ + + unsigned long i; + + disable_interrupts (); + + /* turn off I/D-cache */ + asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (i)); + i &= ~(C1_DC | C1_IC); + asm ("mcr p15, 0, %0, c1, c0, 0": :"r" (i)); + + /* flush I/D-cache */ + i = 0; + asm ("mcr p15, 0, %0, c7, c7, 0": :"r" (i)); + + return (0); +} + +int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + disable_interrupts (); + reset_cpu (0); + /*NOTREACHED*/ + return (0); +} + +void icache_enable (void) +{ + ulong reg; + + reg = read_p15_c1 (); /* get control reg. */ + cp_delay (); + write_p15_c1 (reg | C1_IC); +} + +void icache_disable (void) +{ + ulong reg; + + reg = read_p15_c1 (); + cp_delay (); + write_p15_c1 (reg & ~C1_IC); +} + +int icache_status (void) +{ + return (read_p15_c1 () & C1_IC) != 0; +} + +#ifdef USE_922T_MMU +/* It makes no sense to use the dcache if the MMU is not enabled */ +void dcache_enable (void) +{ + ulong reg; + + reg = read_p15_c1 (); + cp_delay (); + write_p15_c1 (reg | C1_DC); +} + +void dcache_disable (void) +{ + ulong reg; + + reg = read_p15_c1 (); + cp_delay (); + reg &= ~C1_DC; + write_p15_c1 (reg); +} + +int dcache_status (void) +{ + return (read_p15_c1 () & C1_DC) != 0; +} +#endif