2 Feb
2019
2 Feb
'19
2:10 p.m.
On Fri, Feb 1, 2019 at 10:38 PM Vignesh R vigneshr@ti.com wrote:
[...]
Yes, zynq qspi ia unable to handle larger than 16MiB flashes so we used BAR to access those.
I wonder how those boards work in kernel that does not support BAR. Anyways, if you provide a list of SPI controllers on zynq SoCs, I will add an imply SPI_FLASH_BAR for such Kconfigs and send a separate patch.
for zynq_qspi driver used boards yes and other you can proceed at this moment.
You mean config ZYNQ_QSPI and config ZYNQMP_GQSPI need BAR support? I will send a follow up patch on top of this series
ZYNQ_QSPI as for as I know, rest don't require or supported.