Import Linux commits:
37f3e0096f71 ("ARM: dts: uniphier: add reset-names to NAND controller node") e98d5023fe1f ("arm64: dts: uniphier: add reset-names to NAND controller node")
Signed-off-by: Masahiro Yamada yamada.masahiro@socionext.com ---
arch/arm/dts/uniphier-ld11.dtsi | 3 ++- arch/arm/dts/uniphier-ld20.dtsi | 3 ++- arch/arm/dts/uniphier-ld4.dtsi | 3 ++- arch/arm/dts/uniphier-pro4.dtsi | 3 ++- arch/arm/dts/uniphier-pro5.dtsi | 3 ++- arch/arm/dts/uniphier-pxs2.dtsi | 3 ++- arch/arm/dts/uniphier-pxs3.dtsi | 3 ++- arch/arm/dts/uniphier-sld8.dtsi | 3 ++- 8 files changed, 16 insertions(+), 8 deletions(-)
diff --git a/arch/arm/dts/uniphier-ld11.dtsi b/arch/arm/dts/uniphier-ld11.dtsi index b3d44e868956..e0737ac7f06c 100644 --- a/arch/arm/dts/uniphier-ld11.dtsi +++ b/arch/arm/dts/uniphier-ld11.dtsi @@ -631,7 +631,8 @@ pinctrl-0 = <&pinctrl_nand>; clock-names = "nand", "nand_x", "ecc"; clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>; - resets = <&sys_rst 2>; + reset-names = "nand", "reg"; + resets = <&sys_rst 2>, <&sys_rst 2>; }; }; }; diff --git a/arch/arm/dts/uniphier-ld20.dtsi b/arch/arm/dts/uniphier-ld20.dtsi index 5a7bd3301dd7..59e4191dfc39 100644 --- a/arch/arm/dts/uniphier-ld20.dtsi +++ b/arch/arm/dts/uniphier-ld20.dtsi @@ -954,7 +954,8 @@ pinctrl-0 = <&pinctrl_nand>; clock-names = "nand", "nand_x", "ecc"; clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>; - resets = <&sys_rst 2>; + reset-names = "nand", "reg"; + resets = <&sys_rst 2>, <&sys_rst 2>; }; }; }; diff --git a/arch/arm/dts/uniphier-ld4.dtsi b/arch/arm/dts/uniphier-ld4.dtsi index e40407a0dfa5..1eebc7fa3bee 100644 --- a/arch/arm/dts/uniphier-ld4.dtsi +++ b/arch/arm/dts/uniphier-ld4.dtsi @@ -408,7 +408,8 @@ pinctrl-0 = <&pinctrl_nand2cs>; clock-names = "nand", "nand_x", "ecc"; clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>; - resets = <&sys_rst 2>; + reset-names = "nand", "reg"; + resets = <&sys_rst 2>, <&sys_rst 2>; }; }; }; diff --git a/arch/arm/dts/uniphier-pro4.dtsi b/arch/arm/dts/uniphier-pro4.dtsi index 7e81260d33d3..d006b45f7a3d 100644 --- a/arch/arm/dts/uniphier-pro4.dtsi +++ b/arch/arm/dts/uniphier-pro4.dtsi @@ -636,7 +636,8 @@ pinctrl-0 = <&pinctrl_nand>; clock-names = "nand", "nand_x", "ecc"; clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>; - resets = <&sys_rst 2>; + reset-names = "nand", "reg"; + resets = <&sys_rst 2>, <&sys_rst 2>; }; }; }; diff --git a/arch/arm/dts/uniphier-pro5.dtsi b/arch/arm/dts/uniphier-pro5.dtsi index 05828d785cec..ba7e224b38e6 100644 --- a/arch/arm/dts/uniphier-pro5.dtsi +++ b/arch/arm/dts/uniphier-pro5.dtsi @@ -499,7 +499,8 @@ pinctrl-0 = <&pinctrl_nand2cs>; clock-names = "nand", "nand_x", "ecc"; clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>; - resets = <&sys_rst 2>; + reset-names = "nand", "reg"; + resets = <&sys_rst 2>, <&sys_rst 2>; };
emmc: mmc@68400000 { diff --git a/arch/arm/dts/uniphier-pxs2.dtsi b/arch/arm/dts/uniphier-pxs2.dtsi index bf852c28005a..8d968d368102 100644 --- a/arch/arm/dts/uniphier-pxs2.dtsi +++ b/arch/arm/dts/uniphier-pxs2.dtsi @@ -809,7 +809,8 @@ pinctrl-0 = <&pinctrl_nand2cs>; clock-names = "nand", "nand_x", "ecc"; clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>; - resets = <&sys_rst 2>; + reset-names = "nand", "reg"; + resets = <&sys_rst 2>, <&sys_rst 2>; }; }; }; diff --git a/arch/arm/dts/uniphier-pxs3.dtsi b/arch/arm/dts/uniphier-pxs3.dtsi index f830cef8941e..ed079c171137 100644 --- a/arch/arm/dts/uniphier-pxs3.dtsi +++ b/arch/arm/dts/uniphier-pxs3.dtsi @@ -831,7 +831,8 @@ pinctrl-0 = <&pinctrl_nand>; clock-names = "nand", "nand_x", "ecc"; clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>; - resets = <&sys_rst 2>; + reset-names = "nand", "reg"; + resets = <&sys_rst 2>, <&sys_rst 2>; }; }; }; diff --git a/arch/arm/dts/uniphier-sld8.dtsi b/arch/arm/dts/uniphier-sld8.dtsi index 332a4da9d659..393157eb14ed 100644 --- a/arch/arm/dts/uniphier-sld8.dtsi +++ b/arch/arm/dts/uniphier-sld8.dtsi @@ -412,7 +412,8 @@ pinctrl-0 = <&pinctrl_nand2cs>; clock-names = "nand", "nand_x", "ecc"; clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>; - resets = <&sys_rst 2>; + reset-names = "nand", "reg"; + resets = <&sys_rst 2>, <&sys_rst 2>; }; }; };