Hi Simon,
We have such piece dtb in device tree, however with SPL_OF_PLATDATA, it failed to compile. It could not correct get address-cells/size-cells from cpus node. Actually It not find the address-cell/size-cell property from cpus node. Do you have any suggestions?
/{ cpus { #address-cells = <2>; #size-cells = <0>;
/* We have 1 clusters having 4 Cortex-A35 cores */ A35_0: cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a35"; reg = <0x0 0x0>; enable-method = "psci"; next-level-cache = <&A35_L2>; };
Traceback (most recent call last): File "./tools/dtoc/dtoc", line 109, in <module> options.output) File "/home/Freenix/work/sw-stash/uboot-upstream/u-boot/tools/dtoc/dtb_platdata.py", line 566, in run_steps plat.scan_reg_sizes() File "/home/Freenix/work/sw-stash/uboot-upstream/u-boot/tools/dtoc/dtb_platdata.py", line 326, in scan_reg_sizes (node.name, len(reg.value), na, ns)) ValueError: Node 'cpu@0' reg property has 2 cells which is not a multiple of na + ns = 2 + 2) make[1]: *** [scripts/Makefile.spl:301: spl/dts/dt-platdata.c] Error 1 make: *** [Makefile:1678: spl/u-boot-spl] Error 2
Thanks, Peng.