On 11/29/2017 07:02 PM, Wenbin Song wrote:
Update IFC NOR timings to fix that the NOR flash can not be erased with V4 FPGA image on ls1046aqds.
Signed-off-by: Wenbin Song wenbin.song@nxp.com
include/configs/ls1046aqds.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h index df70bd398f..b619dc7939 100644 --- a/include/configs/ls1046aqds.h +++ b/include/configs/ls1046aqds.h @@ -194,10 +194,10 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_NOR_FTIM1 (FTIM1_NOR_TACO(0x35) | \ FTIM1_NOR_TRAD_NOR(0x1a) | \ FTIM1_NOR_TSEQRAD_NOR(0x13)) -#define CONFIG_SYS_NOR_FTIM2 (FTIM2_NOR_TCS(0x4) | \
FTIM2_NOR_TCH(0x4) | \+#define CONFIG_SYS_NOR_FTIM2 (FTIM2_NOR_TCS(0x8) | \
FTIM2_NOR_TCH(0x8) | \ FTIM2_NOR_TWPH(0xe) | \
FTIM2_NOR_TWP(0x1c))
FTIM2_NOR_TWP(0x38))
Wenbin,
You slow it down a lot. Did you actually calculate the timing? Can you post the numbers? This will impact on NOR flash performance.
York