From: Siva Durga Prasad Paladugu siva.durga.paladugu@xilinx.com
Remove non driver model support as it moved to driver model. Dont need non driver model anymore.
Signed-off-by: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Michal Simek michal.simek@xilinx.com ---
arch/arm/mach-zynq/include/mach/gpio.h | 2 - drivers/gpio/zynq_gpio.c | 158 +-------------------------------- 2 files changed, 1 insertion(+), 159 deletions(-)
diff --git a/arch/arm/mach-zynq/include/mach/gpio.h b/arch/arm/mach-zynq/include/mach/gpio.h index 0789c497368d..956492b7600a 100644 --- a/arch/arm/mach-zynq/include/mach/gpio.h +++ b/arch/arm/mach-zynq/include/mach/gpio.h @@ -8,8 +8,6 @@ #ifndef _ZYNQ_GPIO_H #define _ZYNQ_GPIO_H
-#define ZYNQ_GPIO_BASE_ADDRESS 0xE000A000 - /* Maximum banks */ #define ZYNQ_GPIO_MAX_BANK 4
diff --git a/drivers/gpio/zynq_gpio.c b/drivers/gpio/zynq_gpio.c index 92c9f0ecd12e..07c2eb54ff30 100644 --- a/drivers/gpio/zynq_gpio.c +++ b/drivers/gpio/zynq_gpio.c @@ -13,8 +13,6 @@ #include <asm/gpio.h> #include <asm/io.h> #include <asm/errno.h> - -#ifdef CONFIG_DM_GPIO #include <dm.h> #include <fdtdec.h>
@@ -23,7 +21,6 @@ DECLARE_GLOBAL_DATA_PTR; struct zynq_gpio_privdata { phys_addr_t base; }; -#endif
/** * zynq_gpio_get_bank_pin - Get the bank number and pin number within that bank @@ -65,7 +62,7 @@ static inline void zynq_gpio_get_bank_pin(unsigned int pin_num, } }
-int gpio_is_valid(unsigned gpio) +static int gpio_is_valid(unsigned gpio) { return (gpio >= 0) && (gpio < ZYNQ_GPIO_NR_GPIOS); } @@ -79,158 +76,6 @@ static int check_gpio(unsigned gpio) return 0; }
-#ifndef CONFIG_DM_GPIO -/** - * gpio_get_value - Get the state of the specified pin of GPIO device - * @gpio: gpio pin number within the device - * - * This function reads the state of the specified pin of the GPIO device. - * - * Return: 0 if the pin is low, 1 if pin is high. - */ -int gpio_get_value(unsigned gpio) -{ - u32 data; - unsigned int bank_num, bank_pin_num; - - if (check_gpio(gpio) < 0) - return -1; - - zynq_gpio_get_bank_pin(gpio, &bank_num, &bank_pin_num); - - data = readl(ZYNQ_GPIO_BASE_ADDRESS + - ZYNQ_GPIO_DATA_RO_OFFSET(bank_num)); - - return (data >> bank_pin_num) & 1; -} - -/** - * gpio_set_value - Modify the value of the pin with specified value - * @gpio: gpio pin number within the device - * @value: value used to modify the value of the specified pin - * - * This function calculates the register offset (i.e to lower 16 bits or - * upper 16 bits) based on the given pin number and sets the value of a - * gpio pin to the specified value. The value is either 0 or non-zero. - */ -int gpio_set_value(unsigned gpio, int value) -{ - unsigned int reg_offset, bank_num, bank_pin_num; - - if (check_gpio(gpio) < 0) - return -1; - - zynq_gpio_get_bank_pin(gpio, &bank_num, &bank_pin_num); - - if (bank_pin_num >= ZYNQ_GPIO_MID_PIN_NUM) { - /* only 16 data bits in bit maskable reg */ - bank_pin_num -= ZYNQ_GPIO_MID_PIN_NUM; - reg_offset = ZYNQ_GPIO_DATA_MSW_OFFSET(bank_num); - } else { - reg_offset = ZYNQ_GPIO_DATA_LSW_OFFSET(bank_num); - } - - /* - * get the 32 bit value to be written to the mask/data register where - * the upper 16 bits is the mask and lower 16 bits is the data - */ - value = !!value; - value = ~(1 << (bank_pin_num + ZYNQ_GPIO_MID_PIN_NUM)) & - ((value << bank_pin_num) | ZYNQ_GPIO_UPPER_MASK); - - writel(value, ZYNQ_GPIO_BASE_ADDRESS + reg_offset); - - return 0; -} - -/** - * gpio_direction_input - Set the direction of the specified GPIO pin as input - * @gpio: gpio pin number within the device - * - * This function uses the read-modify-write sequence to set the direction of - * the gpio pin as input. - * - * Return: -1 if invalid gpio specified, 0 if successul - */ -int gpio_direction_input(unsigned gpio) -{ - u32 reg; - unsigned int bank_num, bank_pin_num; - - if (check_gpio(gpio) < 0) - return -1; - - zynq_gpio_get_bank_pin(gpio, &bank_num, &bank_pin_num); - - /* bank 0 pins 7 and 8 are special and cannot be used as inputs */ - if (bank_num == 0 && (bank_pin_num == 7 || bank_pin_num == 8)) - return -1; - - /* clear the bit in direction mode reg to set the pin as input */ - reg = readl(ZYNQ_GPIO_BASE_ADDRESS + ZYNQ_GPIO_DIRM_OFFSET(bank_num)); - reg &= ~BIT(bank_pin_num); - writel(reg, ZYNQ_GPIO_BASE_ADDRESS + ZYNQ_GPIO_DIRM_OFFSET(bank_num)); - - return 0; -} - -/** - * gpio_direction_output - Set the direction of the specified GPIO pin as output - * @gpio: gpio pin number within the device - * @value: value to be written to specified pin - * - * This function sets the direction of specified GPIO pin as output, configures - * the Output Enable register for the pin and uses zynq_gpio_set to set - * the value of the pin to the value specified. - * - * Return: 0 always - */ -int gpio_direction_output(unsigned gpio, int value) -{ - u32 reg; - unsigned int bank_num, bank_pin_num; - - if (check_gpio(gpio) < 0) - return -1; - - zynq_gpio_get_bank_pin(gpio, &bank_num, &bank_pin_num); - - /* set the GPIO pin as output */ - reg = readl(ZYNQ_GPIO_BASE_ADDRESS + ZYNQ_GPIO_DIRM_OFFSET(bank_num)); - reg |= BIT(bank_pin_num); - writel(reg, ZYNQ_GPIO_BASE_ADDRESS + ZYNQ_GPIO_DIRM_OFFSET(bank_num)); - - /* configure the output enable reg for the pin */ - reg = readl(ZYNQ_GPIO_BASE_ADDRESS + ZYNQ_GPIO_OUTEN_OFFSET(bank_num)); - reg |= BIT(bank_pin_num); - writel(reg, ZYNQ_GPIO_BASE_ADDRESS + ZYNQ_GPIO_OUTEN_OFFSET(bank_num)); - - /* set the state of the pin */ - gpio_set_value(gpio, value); - return 0; -} - -/** - * Request a gpio before using it. - * - * NOTE: Argument 'label' is unused. - */ -int gpio_request(unsigned gpio, const char *label) -{ - if (check_gpio(gpio) < 0) - return -1; - - return 0; -} - -/** - * Reset and free the gpio after using it. - */ -int gpio_free(unsigned gpio) -{ - return 0; -} -#else static int zynq_gpio_get_value(struct udevice *dev, unsigned gpio) { u32 data; @@ -368,4 +213,3 @@ U_BOOT_DRIVER(gpio_zynq) = { .probe = zynq_gpio_probe, .priv_auto_alloc_size = sizeof(struct zynq_gpio_privdata), }; -#endif