Hello all,
I had written to the u-boot list about some problems I had with the Flash Chip on a custom board. See mail below.
We have solved those problems. I wanted to update the u-boot list with what we discovered, so it could be useful for others in the future.
The basic problem we were facing was that the Flash Chip was misbehaving. We couldn't program it correctly, this was preventing us from burning u-boot to Flash.
The reason why Flash was misbehaving was this: there were 2 special pins from the 440GP connected to the Flash (reset and write protect). The write protect pin has to be *ALWAYS* driven HIGH for normal operations. The reset pin must be *INITIALLY* driven LOW and driven *HIGH* for normal operations. In our board, these pins were connected to the GPIO pins of the 440GP. After 440GP resets, the GPIO pins are disabled and these pins were left floating (High Impedance). This caused the Flash to misbehave.
Also, we used the BDI2000 debugger to enable the GPIO pins and drive a "1" to these pins. Then, the FLASH started working fine. We are yet to find a solution to this problem without the BDI, but the board designers know what to do.
I thank the u-boot mailing list for being such an incredible resource for debugging the u-boot code.
Thanks again, Let me know if there any questions, G.Sibi
On 5/24/06, Madhu Saravana Sibi Govindan ssshayagriva@gmail.com wrote:
Hello all,
I know that this question may be out of place, but I thought someone in the group might have encountered this situation.
I'm using the ST M29W320DB Flash Chip on a custom board based on 440GP. I'm using the BDI2000 Hardware debugger to burn the u-boot code onto this flash. I think I have got my BDI2000 config file wrong. So, when I burn the U-boot code, the same byte gets written to all the 256 KB of addresses (0xfffc0000 to 0xffffffff).
The following is a snippet of the BDI 2000 config file (I got these values by referring to the Ultimate Solutions webpage):
CHIPTYPE AM29BX8 ;Flash type (AM29F | AM29BX8 | AM29BX16 | I28BX8 | I28BX16) CHIPSIZE 0x400000 ;The size of one flash chip in bytes (e.g. AM29F040 = 0x80000) BUSWIDTH 8 ;The width of the flash memory bus in bits (8 | 16 | 32)
Also, I see this behavior when I do mm, mmh or mmb commands to modify the flash memory too.
Has anyone seen this behavior and know how to correct this? I'm also going to write to Ultimate Solutions about this.
Thanks again and sorry if the question is out of place, Regards, G.Sibi
PS: See below for my full BDI2000 Config file.
;bdiGDB configuration file for IBM 440GP Reference Board ; ------------------------------------------------------ ; [INIT] ;DELAY 500 ; MMAP 0xfffc0000 0xfffd0000 ; MMAP 0xFFFD0000 0xFFFD0000 ; Setup TLB WTLB 0xF0000095 0x1F00003F ;Boot Space 256MB WTLB 0x00000098 0x0000003F ;SDRAM 256MB @ 0x00000000
; Setup Peripheral Bus WDCR 0x12 0x00000010 ;Select EBC0_B0AP WDCR 0x13 0x9B015480 ;B0AP: Flash and SRAM WDCR 0x12 0x00000000 ;Select EBC0_B0CR WDCR 0x13 0xFFC58000 ;B0CR: 4MB at 0xFFC00000, r/w, 8bit WDCR 0x12 0x00000012 ;Select EBC0_B2AP WDCR 0x13 0x9B015480 ;B2AP: 4 MB Flash WDCR 0x12 0x00000002 ;Select EBC0_B2CR WDCR 0x13 0xff858000 ;B2CR: 4MB at 0xFF800000, r/w, 8bit
; Setup SDRAM Controller (DDR SDRAM) ; single-sided,non-buffered, 12x10(4), 128MB DIMM ; ; Tue May 16 15:06:06 CDT 2006 ; Wed May 17 10:53:01 CDT 2006 WDCR 0x10 0x00000082 ;Select SDRAM0_CLKTR WDCR 0x11 0x40000000 ;CLKTR: Advance 90 degrees WDCR 0x10 0x00000080 ;Select SDRAM0_TR0 WDCR 0x11 0x410A4012 ;TR0: V2.0 WDCR 0x10 0x00000081 ;Select SDRAM0_TR1 WDCR 0x10 0x00000040 ;Select SDRAM0_B0CR WDCR 0x11 0x000A4001 ;B0CR: WDCR 0x10 0x00000030 ;Select SDRAM0_RTR WDCR 0x11 0x08200000 ;RTR: V2.0 WDCR 0x10 0x00000020 ;Select SDRAM0_CFG0 WDCR 0x11 0x06000000 ;CFG0: 64bit, PMU disable WDCR 0x11 0x06180000 ;RTR: V1.0
;;;;;;;;;;;;;;; ; bad ?? WDCR 0x11 0x86000000 ;CFG0: enable SDRAM WDCR 0x11 0x8080082B ;TR1: V2.0
;;;;;;;;;;;;;;; ; nonono ;WDCR 0x11 0x41054009 ;TR0: V1.0 ;WDCR 0x11 0x40400800 ;TR1: V1.0
[TARGET] ; BDIMODE LOADONLY ; nobody uses STARTUP RESET ; the default ;STARTUP RUN ; boot the bootloader JTAGCLOCK 1 ;use 8 MHz JTAG clock CPUTYPE 440 ;the used target CPU type WAKEUP 1000 ;wakeup time after reset BREAKMODE SOFT ;SOFT or HARD, HARD uses PPC hardware breakpoint STEPMODE JTAG ;JTAG or HWBP, HWBP uses one or two hardware breakpoints ; VECTOR CATCH ;catch unhandled exceptions ;MMU XLAT 0xC0000000 ;enable virtual address mode ;PTBASE 0x00000000 ;address where kernel/user stores pointer to page table ;SIO 7 9600 ;TCP port for serial IO
[HOST] ; IP 192.168.1.1 ;IP 192.168.1.240 ; krum IP 192.168.1.2 ; Laptop FILE u-boot.bin FORMAT BIN DUMP dump.bin PROMPT ebony>
[FLASH] ;WORKSPACE 0x00004000 ;workspace in SDRAM for fast programming algorithm ;WORKSPACE 0xFFF00000 ;workspace in SRAM for fast programming algorithm
; use when all is well ;WORKSPACE 0x00000000 ;workspace in SDRAM for fast programming algorithm CHIPTYPE AM29BX16 ;Flash type (AM29F | AM29BX8 | AM29BX16 | I28BX8 | I28BX16) CHIPSIZE 0x400000 ;The size of one flash chip in bytes (e.g. AM29F040 = 0x80000) BUSWIDTH 8 ;The width of the flash memory bus in bits (8 | 16 | 32) FILE c:\tftpboot\u-boot.bin FORMAT BIN 0xFFFC0000 ;ERASE 0xFFF80000 ;erase sector 0 of flash in U60 (AM29F040) ;ERASE 0xFFF90000 ;erase sector 1 of flash ;ERASE 0xFFFA0000 ;erase sector 2 of flash ;ERASE 0xFFFB0000 ;erase sector 3 of flash ;ERASE 0xFFFC0000 ;erase sector 4 of flash ;ERASE 0xFFFD0000 ;erase sector 5 of flash ;ERASE 0xFFFE0000 ;erase sector 6 of flash ;ERASE 0xFFFF0000 ;erase sector 7 of flash ERASE 0xFFFC0000 ;erase sector 0 of flash
[REGS] IDCR1 0x010 0x011 ;SDRAM0_CFGADDR and SDRAM0_CFGDATA IDCR2 0x012 0x013 ;EBC0_CFGADDR and EBC0_CFGDATA IDCR3 0x014 0x015 ;EBM0_CFGADDR and EBM0_CFGDATA IDCR4 0x016 0x017 ;PPM0_CFGADDR and PPM0_CFGDATA FILE c:\tftpboot\ebony\reg440gp.def