Testing showed a small perfomance gain by using this ready pin to detect the NAND chip state. Here the values tested on Draco with Hynix 4GBit NAND:
Without NAND ready pin:
U-Boot# time nand read 80400000 0 400000
NAND read: device 0 offset 0x0, size 0x400000 4194304 bytes read: OK
time: 2.947 seconds, 2947 ticks
With NAND ready pin:
U-Boot# time nand read 80400000 0 400000
NAND read: device 0 offset 0x0, size 0x400000 4194304 bytes read: OK
time: 2.795 seconds, 2795 ticks
So an increase of approx. 5%.
Signed-off-by: Stefan Roese sr@denx.de Cc: Tom Rini trini@ti.com Cc: Scott Wood scottwood@freescale.com Cc: Roger Meier r.meier@siemens.com Cc: Samuel Egli samuel.egli@siemens.com --- include/configs/siemens-am33x-common.h | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h index 0d5dba1..9f84e09 100644 --- a/include/configs/siemens-am33x-common.h +++ b/include/configs/siemens-am33x-common.h @@ -466,6 +466,8 @@ /* CS0 */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ +#define CONFIG_SYS_NAND_USE_READY + #if !defined(CONFIG_SPI_BOOT) #undef CONFIG_ENV_IS_NOWHERE #define CONFIG_ENV_IS_IN_NAND