On 04/05/2017 04:53 PM, Simon Glass wrote:
At present there is not operation to invalidate a cache range. This seems to be needed to fill out the cache operations. Add an implementation based on the flush operation.
Signed-off-by: Simon Glass sjg@chromium.org
arch/arm/cpu/armv8/cache.S | 24 ++++++++++++++++++++++++ arch/arm/cpu/armv8/cache_v8.c | 2 +- arch/arm/include/asm/system.h | 15 +++++++++++++++ 3 files changed, 40 insertions(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv8/cache.S b/arch/arm/cpu/armv8/cache.S index f1deaa7230..7cba308ee7 100644 --- a/arch/arm/cpu/armv8/cache.S +++ b/arch/arm/cpu/armv8/cache.S @@ -138,6 +138,30 @@ ENTRY(__asm_flush_dcache_range) dsb sy ret ENDPROC(__asm_flush_dcache_range) +/*
- void __asm_invalidate_dcache_range(start, end)
- invalidate data cache in the range
- x0: start address
- x1: end address
- */
+ENTRY(__asm_invalidate_dcache_range)
- mrs x3, ctr_el0
- ubfm x3, x3, #16, #19
- mov x2, #4
- lsl x2, x2, x3 /* cache line size */
- /* x2 <- minimal cache line size in cache system */
- sub x3, x2, #1
- bic x0, x0, x3
+1: dc ivac, x0 /* invalidate data or unified cache */
- add x0, x0, x2
- cmp x0, x1
- b.lo 1b
- dsb sy
- ret
+ENDPROC(__asm_invalidate_dcache_range)
The only difference from __asm_flush_dcache_range is the dcivac vs dccivac. It can also be wrapped up like we have for __asm_invalidate_dcache_all. This function is small enough to be duplicated though.
Reviewed-by: York Sun york.sun@nxp.com