Compared to the Armada 3700, the Armada 7K and 8K are much more on the high-end side: they use a dual Cortex-A72 or a quad Cortex-A72, as opposed to the Cortex-A53 for the Armada 3700.
The Armada 7K and 8K also use a fairly unique architecture, internally they are composed of several components:
- One AP (Application Processor), which contains the processor itself and a few core hardware blocks. The AP used in the Armada 7K and 8K is called AP806, and is available in two configurations: dual Cortex-A72 and quad Cortex-A72. - One or two CP (Communication Processor), which contain most of the I/O interfaces (SATA, PCIe, Ethernet, etc.). The 7K family chips have one CP, while the 8K family chips integrate two CPs, providing two times the number of I/O interfaces available in the CP. The CP used in the 7K and 8K is called CP110.
All in all, this gives the following combinations:
- Armada 7020, which is a dual Cortex-A72 with one CP - Armada 7040, which is a quad Cortex-A72 with one CP - Armada 8020, which is a dual Cortex-A72 with two CPs - Armada 8040, which is a quad Cortex-A72 with two CPs
This patch adds basic support for this ARMv8 based SoC into U-Boot. Future patches will integrate other device drivers and board support, starting with the Marvell DB-88F7040 development board.
Signed-off-by: Stefan Roese sr@denx.de Cc: Nadav Haklai nadavh@marvell.com Cc: Neta Zur Hershkovits neta@marvell.com Cc: Kostya Porotchkin kostap@marvell.com Cc: Omri Itach omrii@marvell.com Cc: Igal Liberman igall@marvell.com Cc: Haim Boot hayim@marvell.com Cc: Hanna Hawa hannah@marvell.com --- arch/arm/Kconfig | 2 +- arch/arm/mach-mvebu/Kconfig | 7 +- arch/arm/mach-mvebu/Makefile | 3 + arch/arm/mach-mvebu/arm64-common.c | 124 ++++++++++++++++++++++++++++ arch/arm/mach-mvebu/armada3700/Makefile | 1 - arch/arm/mach-mvebu/armada3700/cpu.c | 107 ------------------------ arch/arm/mach-mvebu/armada8k/Makefile | 7 ++ arch/arm/mach-mvebu/armada8k/cpu.c | 64 ++++++++++++++ arch/arm/mach-mvebu/include/mach/soc.h | 2 + arch/arm/mach-mvebu/{armada3700 => }/sata.c | 9 ++ 10 files changed, 216 insertions(+), 110 deletions(-) create mode 100644 arch/arm/mach-mvebu/arm64-common.c create mode 100644 arch/arm/mach-mvebu/armada8k/Makefile create mode 100644 arch/arm/mach-mvebu/armada8k/cpu.c rename arch/arm/mach-mvebu/{armada3700 => }/sata.c (77%)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index f9d0d2e..61a2fe6 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -164,7 +164,7 @@ config KIRKWOOD select CPU_ARM926EJS
config ARCH_MVEBU - bool "Marvell MVEBU family (Armada XP/375/38x)" + bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)" select OF_CONTROL select OF_SEPARATE select DM diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig index bede700..54b3b72 100644 --- a/arch/arm/mach-mvebu/Kconfig +++ b/arch/arm/mach-mvebu/Kconfig @@ -31,6 +31,11 @@ config ARMADA_3700 bool select ARM64
+# Armada 7K and 8K are very similar - use only one Kconfig symbol for both +config ARMADA_8K + bool + select ARM64 + # Armada XP/38x SoC types... config MV78230 bool @@ -49,7 +54,7 @@ config DB_88F6820_GP select ARMADA_38X
choice - prompt "Marvell MVEBU (Armada XP/375/38x/3700) board select" + prompt "Armada XP/375/38x/3700/7K/8K board select" optional
config TARGET_CLEARFOG diff --git a/arch/arm/mach-mvebu/Makefile b/arch/arm/mach-mvebu/Makefile index 07dc16c..65e90c4 100644 --- a/arch/arm/mach-mvebu/Makefile +++ b/arch/arm/mach-mvebu/Makefile @@ -7,6 +7,9 @@ ifdef CONFIG_ARM64
obj-$(CONFIG_ARMADA_3700) += armada3700/ +obj-$(CONFIG_ARMADA_8K) += armada8k/ +obj-y += arm64-common.o +obj-y += sata.o
else # CONFIG_ARM64
diff --git a/arch/arm/mach-mvebu/arm64-common.c b/arch/arm/mach-mvebu/arm64-common.c new file mode 100644 index 0000000..7055a81 --- /dev/null +++ b/arch/arm/mach-mvebu/arm64-common.c @@ -0,0 +1,124 @@ +/* + * Copyright (C) 2016 Stefan Roese sr@denx.de + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <dm.h> +#include <fdtdec.h> +#include <libfdt.h> +#include <asm/io.h> +#include <asm/system.h> +#include <asm/arch/cpu.h> +#include <asm/arch/soc.h> +#include <asm/armv8/mmu.h> + +DECLARE_GLOBAL_DATA_PTR; + +/* + * On ARMv8, MBus is not configured in U-Boot. To enable compilation + * of the already implemented drivers, lets add a dummy version of + * this function so that linking does not fail. + */ +const struct mbus_dram_target_info *mvebu_mbus_dram_info(void) +{ + return NULL; +} + +/* DRAM init code ... */ + +static const void *get_memory_reg_prop(const void *fdt, int *lenp) +{ + int offset; + + offset = fdt_path_offset(fdt, "/memory"); + if (offset < 0) + return NULL; + + return fdt_getprop(fdt, offset, "reg", lenp); +} + +int dram_init(void) +{ + const void *fdt = gd->fdt_blob; + const fdt32_t *val; + int ac, sc, len; + + ac = fdt_address_cells(fdt, 0); + sc = fdt_size_cells(fdt, 0); + if (ac < 0 || sc < 1 || sc > 2) { + printf("invalid address/size cells\n"); + return -EINVAL; + } + + val = get_memory_reg_prop(fdt, &len); + if (len / sizeof(*val) < ac + sc) + return -EINVAL; + + val += ac; + + gd->ram_size = fdtdec_get_number(val, sc); + + debug("DRAM size = %08lx\n", (unsigned long)gd->ram_size); + + return 0; +} + +void dram_init_banksize(void) +{ + const void *fdt = gd->fdt_blob; + const fdt32_t *val; + int ac, sc, cells, len, i; + + val = get_memory_reg_prop(fdt, &len); + if (len < 0) + return; + + ac = fdt_address_cells(fdt, 0); + sc = fdt_size_cells(fdt, 0); + if (ac < 1 || sc > 2 || sc < 1 || sc > 2) { + printf("invalid address/size cells\n"); + return; + } + + cells = ac + sc; + + len /= sizeof(*val); + + for (i = 0; i < CONFIG_NR_DRAM_BANKS && len >= cells; + i++, len -= cells) { + gd->bd->bi_dram[i].start = fdtdec_get_number(val, ac); + val += ac; + gd->bd->bi_dram[i].size = fdtdec_get_number(val, sc); + val += sc; + + debug("DRAM bank %d: start = %08lx, size = %08lx\n", + i, (unsigned long)gd->bd->bi_dram[i].start, + (unsigned long)gd->bd->bi_dram[i].size); + } +} + +int arch_cpu_init(void) +{ + /* Nothing to do (yet) */ + return 0; +} + +int arch_early_init_r(void) +{ + struct udevice *dev; + int ret; + + /* Call the comphy code via the MISC uclass driver */ + ret = uclass_get_device(UCLASS_MISC, 0, &dev); + if (ret) { + debug("COMPHY init failed: %d\n", ret); + return -ENODEV; + } + + /* Cause the SATA device to do its early init */ + uclass_first_device(UCLASS_AHCI, &dev); + + return 0; +} diff --git a/arch/arm/mach-mvebu/armada3700/Makefile b/arch/arm/mach-mvebu/armada3700/Makefile index b1fac57..84c69d9 100644 --- a/arch/arm/mach-mvebu/armada3700/Makefile +++ b/arch/arm/mach-mvebu/armada3700/Makefile @@ -5,4 +5,3 @@ #
obj-y = cpu.o -obj-y += sata.o diff --git a/arch/arm/mach-mvebu/armada3700/cpu.c b/arch/arm/mach-mvebu/armada3700/cpu.c index 7d8f7b8..6499eec 100644 --- a/arch/arm/mach-mvebu/armada3700/cpu.c +++ b/arch/arm/mach-mvebu/armada3700/cpu.c @@ -53,16 +53,6 @@ static struct mm_region mvebu_mem_map[] = {
struct mm_region *mem_map = mvebu_mem_map;
-/* - * On ARMv8, MBus is not configured in U-Boot. To enable compilation - * of the already implemented drivers, lets add a dummy version of - * this function so that linking does not fail. - */ -const struct mbus_dram_target_info *mvebu_mbus_dram_info(void) -{ - return NULL; -} - void reset_cpu(ulong ignored) { /* @@ -89,100 +79,3 @@ u32 get_ref_clk(void) else return 40; } - -/* DRAM init code ... */ - -static const void *get_memory_reg_prop(const void *fdt, int *lenp) -{ - int offset; - - offset = fdt_path_offset(fdt, "/memory"); - if (offset < 0) - return NULL; - - return fdt_getprop(fdt, offset, "reg", lenp); -} - -int dram_init(void) -{ - const void *fdt = gd->fdt_blob; - const fdt32_t *val; - int ac, sc, len; - - ac = fdt_address_cells(fdt, 0); - sc = fdt_size_cells(fdt, 0); - if (ac < 0 || sc < 1 || sc > 2) { - printf("invalid address/size cells\n"); - return -EINVAL; - } - - val = get_memory_reg_prop(fdt, &len); - if (len / sizeof(*val) < ac + sc) - return -EINVAL; - - val += ac; - - gd->ram_size = fdtdec_get_number(val, sc); - - debug("DRAM size = %08lx\n", (unsigned long)gd->ram_size); - - return 0; -} - -void dram_init_banksize(void) -{ - const void *fdt = gd->fdt_blob; - const fdt32_t *val; - int ac, sc, cells, len, i; - - val = get_memory_reg_prop(fdt, &len); - if (len < 0) - return; - - ac = fdt_address_cells(fdt, 0); - sc = fdt_size_cells(fdt, 0); - if (ac < 1 || sc > 2 || sc < 1 || sc > 2) { - printf("invalid address/size cells\n"); - return; - } - - cells = ac + sc; - - len /= sizeof(*val); - - for (i = 0; i < CONFIG_NR_DRAM_BANKS && len >= cells; - i++, len -= cells) { - gd->bd->bi_dram[i].start = fdtdec_get_number(val, ac); - val += ac; - gd->bd->bi_dram[i].size = fdtdec_get_number(val, sc); - val += sc; - - debug("DRAM bank %d: start = %08lx, size = %08lx\n", - i, (unsigned long)gd->bd->bi_dram[i].start, - (unsigned long)gd->bd->bi_dram[i].size); - } -} - -int arch_cpu_init(void) -{ - /* Nothing to do (yet) */ - return 0; -} - -int arch_early_init_r(void) -{ - struct udevice *dev; - int ret; - - /* Call the comphy code via the MISC uclass driver */ - ret = uclass_get_device(UCLASS_MISC, 0, &dev); - if (ret) { - debug("COMPHY init failed: %d\n", ret); - return -ENODEV; - } - - /* Cause the SATA device to do its early init */ - uclass_first_device(UCLASS_AHCI, &dev); - - return 0; -} diff --git a/arch/arm/mach-mvebu/armada8k/Makefile b/arch/arm/mach-mvebu/armada8k/Makefile new file mode 100644 index 0000000..84c69d9 --- /dev/null +++ b/arch/arm/mach-mvebu/armada8k/Makefile @@ -0,0 +1,7 @@ +# +# Copyright (C) 2016 Stefan Roese sr@denx.de +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y = cpu.o diff --git a/arch/arm/mach-mvebu/armada8k/cpu.c b/arch/arm/mach-mvebu/armada8k/cpu.c new file mode 100644 index 0000000..036430c --- /dev/null +++ b/arch/arm/mach-mvebu/armada8k/cpu.c @@ -0,0 +1,64 @@ +/* + * Copyright (C) 2016 Stefan Roese sr@denx.de + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <dm.h> +#include <fdtdec.h> +#include <libfdt.h> +#include <asm/io.h> +#include <asm/system.h> +#include <asm/arch/cpu.h> +#include <asm/arch/soc.h> +#include <asm/armv8/mmu.h> + +DECLARE_GLOBAL_DATA_PTR; + +/* Armada 7k/8k */ +#define MVEBU_RFU_BASE (MVEBU_REGISTER(0x6f0000)) +#define RFU_GLOBAL_SW_RST (MVEBU_RFU_BASE + 0x84) +#define RFU_SW_RESET_OFFSET 0 + +static struct mm_region mvebu_mem_map[] = { + { + /* RAM */ + .phys = 0x0UL, + .virt = 0x0UL, + .size = 0x80000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | + PTE_BLOCK_INNER_SHARE + }, + { + /* SRAM, MMIO regions - AP806 region */ + .phys = 0xf0000000UL, + .virt = 0xf0000000UL, + .size = 0x01000000UL, /* 16MiB internal registers */ + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE + }, + { + /* SRAM, MMIO regions - CP110 region */ + .phys = 0xf2000000UL, + .virt = 0xf2000000UL, + .size = 0x02000000UL, /* 32MiB internal registers */ + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE + }, + { + /* List terminator */ + 0, + } +}; + +struct mm_region *mem_map = mvebu_mem_map; + +void reset_cpu(ulong ignored) +{ + u32 reg; + + reg = readl(RFU_GLOBAL_SW_RST); + reg &= ~(1 << RFU_SW_RESET_OFFSET); + writel(reg, RFU_GLOBAL_SW_RST); +} diff --git a/arch/arm/mach-mvebu/include/mach/soc.h b/arch/arm/mach-mvebu/include/mach/soc.h index 063d6cc..731fe65 100644 --- a/arch/arm/mach-mvebu/include/mach/soc.h +++ b/arch/arm/mach-mvebu/include/mach/soc.h @@ -46,6 +46,8 @@ * required for the Linux kernel. */ #define SOC_REGS_PHY_BASE 0xd0000000 +#elif defined(CONFIG_ARMADA_8K) +#define SOC_REGS_PHY_BASE 0xf0000000 #else #define SOC_REGS_PHY_BASE 0xf1000000 #endif diff --git a/arch/arm/mach-mvebu/armada3700/sata.c b/arch/arm/mach-mvebu/sata.c similarity index 77% rename from arch/arm/mach-mvebu/armada3700/sata.c rename to arch/arm/mach-mvebu/sata.c index e0e8381..140a295 100644 --- a/arch/arm/mach-mvebu/armada3700/sata.c +++ b/arch/arm/mach-mvebu/sata.c @@ -19,6 +19,14 @@ __weak int board_ahci_enable(void) return 0; }
+#ifdef CONFIG_ARMADA_8K +/* CP110 has different AHCI port addresses */ +void __iomem *ahci_port_base(void __iomem *base, u32 port) +{ + return base + 0x10000 + (port * 0x10000); +} +#endif + static int mvebu_ahci_probe(struct udevice *dev) { /* @@ -34,6 +42,7 @@ static int mvebu_ahci_probe(struct udevice *dev)
static const struct udevice_id mvebu_ahci_ids[] = { { .compatible = "marvell,armada-3700-ahci" }, + { .compatible = "marvell,armada-8k-ahci" }, { } };