This is required as part of the procedure. The existing code works because it changes the GDT at the same time, but this makes kvm unhappy.
Update the algorithm to disable and then re-enable paging.
Signed-off-by: Simon Glass sjg@chromium.org ---
arch/x86/cpu/i386/call64.S | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/arch/x86/cpu/i386/call64.S b/arch/x86/cpu/i386/call64.S index d81bcc6f8f4..e5a0420d1ba 100644 --- a/arch/x86/cpu/i386/call64.S +++ b/arch/x86/cpu/i386/call64.S @@ -25,6 +25,11 @@ cpu_call64: push %edx /* arg1 = setup_base */ mov %eax, %ebx
+ # disable paging + movl %cr0, %eax + andl $~X86_CR0_PG, %eax + movl %eax, %cr0 + /* Load new GDT with the 64bit segments using 32bit descriptor */ leal gdt, %eax movl %eax, gdt+2 @@ -67,7 +72,8 @@ cpu_call64: pushl %eax
/* Enter paged protected Mode, activating Long Mode */ - movl $(X86_CR0_PG | X86_CR0_PE), %eax + movl %cr0, %eax + orl $X86_CR0_PG, %eax movl %eax, %cr0
/* Jump from 32bit compatibility mode into 64bit mode. */