Re: [U-Boot] [PATCH 1/2] arm: Add minimal support for Cortex-R5

On Friday 20 April 2018 07:21 PM, Michal Simek wrote:

This minimal support will be used by Xilinx ZynqMP R5 cpu.

Signed-off-by: Michal Simek michal.simek@xilinx.com

arch/arm/Kconfig | 6 ++++++ arch/arm/cpu/armv7r/Makefile | 4 ++++ arch/arm/cpu/armv7r/config.mk | 3 +++ arch/arm/cpu/armv7r/cpu.c | 24 ++++++++++++++++++++++++ arch/arm/cpu/armv7r/start.S | 17 +++++++++++++++++ 5 files changed, 54 insertions(+) create mode 100644 arch/arm/cpu/armv7r/Makefile create mode 100644 arch/arm/cpu/armv7r/config.mk create mode 100644 arch/arm/cpu/armv7r/cpu.c create mode 100644 arch/arm/cpu/armv7r/start.S

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index b5fbce03667d..b10804f55224 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -192,6 +192,10 @@ config CPU_V7M select THUMB2_KERNEL select SYS_CACHE_SHIFT_5

+config CPU_V7R

• bool
• select SYS_CACHE_SHIFT_6

select HAS_THUMB2 might be a good option?

config CPU_PXA bool select SYS_CACHE_SHIFT_5 @@ -209,6 +213,7 @@ config SYS_CPU default "arm1176" if CPU_ARM1176 default "armv7" if CPU_V7 default "armv7m" if CPU_V7M

• default "armv7r" if CPU_V7R default "pxa" if CPU_PXA default "sa1100" if CPU_SA1100 default "armv8" if ARM64

@@ -223,6 +228,7 @@ config SYS_ARM_ARCH default 6 if CPU_ARM1176 default 7 if CPU_V7 default 7 if CPU_V7M

• default 7 if CPU_V7R default 5 if CPU_PXA default 4 if CPU_SA1100 default 8 if ARM64

I did a grep of CPU_V7, and you might want to update for CPU_V7R in the following places:

diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 4fa8b38397..f4bc1f250d 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -18,6 +18,7 @@ arch-$(CONFIG_CPU_ARM1136) =-march=armv5 arch-$(CONFIG_CPU_ARM1176) =-march=armv5t arch-$(CONFIG_CPU_V7) =$(call cc-option, -march=armv7-a, \ $(call cc-option, -march=armv7, -march=armv5)) +arch-$(CONFIG_CPU_V7R) =-march=armv7-r arch-$(CONFIG_ARM64) =-march=armv8-a

# On Tegra systems we must build SPL for the armv4 core on the device @@ -41,6 +42,7 @@ tune-$(CONFIG_CPU_PXA) =-mcpu=xscale tune-$(CONFIG_CPU_ARM1136) = tune-$(CONFIG_CPU_ARM1176) = tune-$(CONFIG_CPU_V7) = +tune-$(CONFIG_CPU_V7R) = tune-$(CONFIG_ARM64) =

# Evaluate tune cc-option calls now

diff --git a/arch/arm/cpu/armv7r/Makefile b/arch/arm/cpu/armv7r/Makefile new file mode 100644 index 000000000000..3c66976dfa62 --- /dev/null +++ b/arch/arm/cpu/armv7r/Makefile

hmm..do we really need to create a separate folder? IIUC, the main difference between V7 and V7R is MMU vs MPU. IMHO, we should be able to get it using Kconfigs.

Thanks and regards, Lokesh

@@ -0,0 +1,4 @@ +# SPDX-License-Identifier: GPL-2.0

+extra-y := start.o +obj-y += cpu.o diff --git a/arch/arm/cpu/armv7r/config.mk b/arch/arm/cpu/armv7r/config.mk new file mode 100644 index 000000000000..224d191ff846 --- /dev/null +++ b/arch/arm/cpu/armv7r/config.mk @@ -0,0 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0

+PLATFORM_CPPFLAGS += -mcpu=cortex-r5 -DARMR5 diff --git a/arch/arm/cpu/armv7r/cpu.c b/arch/arm/cpu/armv7r/cpu.c new file mode 100644 index 000000000000..e384a530c5e0 --- /dev/null +++ b/arch/arm/cpu/armv7r/cpu.c @@ -0,0 +1,24 @@ +// SPDX-License-Identifier: GPL-2.0 +/*

• • (C) Copyright 2018 Xilinx, Inc. (Michal Simek)
• */

+#include <common.h>

+/*

• • This is called right before passing control to
• • the Linux kernel point.
• */

+int cleanup_before_linux(void) +{

• return 0;

+}

+/*

• • Perform the low-level reset.
• */

+void reset_cpu(ulong addr) +{

• while (1)

• ;
  

+} diff --git a/arch/arm/cpu/armv7r/start.S b/arch/arm/cpu/armv7r/start.S new file mode 100644 index 000000000000..d6e8eecf54b7 --- /dev/null +++ b/arch/arm/cpu/armv7r/start.S @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/*

• • (C) Copyright 2015
• • Kamil Lulko, kamil.lulko@gmail.com
• */

+#include <asm/assembler.h>

+.globl reset +.type reset, %function +reset:

• W(b) _main

+.globl c_runtime_cpu_setup +c_runtime_cpu_setup:

• mov pc, lr