[U-Boot] [PATCH v2 2/3] ARM: dts: imx6ull-colibri: change hierarchy of DTS files

From: Igor Opaniuk igor.opaniuk@toradex.com

Introduce imx6ull-colibri-u-boot.dtsi for u-boot specific properties to keep original imx6ull-colibri.dts in sync with Linux.

Move all contents of imx6ull-colibri.dts to imx6ull-colibri.dtsi + additionally fix checkpatch warnings.

Signed-off-by: Igor Opaniuk igor.opaniuk@toradex.com ---

arch/arm/dts/imx6ull-colibri-u-boot.dtsi | 4 + arch/arm/dts/imx6ull-colibri.dts | 596 +------------------- arch/arm/dts/imx6ull-colibri.dtsi | 641 ++++++++++++++++++++++ board/toradex/colibri-imx6ull/MAINTAINERS | 2 + 4 files changed, 649 insertions(+), 594 deletions(-) create mode 100644 arch/arm/dts/imx6ull-colibri-u-boot.dtsi create mode 100644 arch/arm/dts/imx6ull-colibri.dtsi

diff --git a/arch/arm/dts/imx6ull-colibri-u-boot.dtsi b/arch/arm/dts/imx6ull-colibri-u-boot.dtsi new file mode 100644 index 0000000000..7d68fb178e --- /dev/null +++ b/arch/arm/dts/imx6ull-colibri-u-boot.dtsi @@ -0,0 +1,4 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright 2019 Toradex AG + */ diff --git a/arch/arm/dts/imx6ull-colibri.dts b/arch/arm/dts/imx6ull-colibri.dts index 6c847ab792..15338a1ae3 100644 --- a/arch/arm/dts/imx6ull-colibri.dts +++ b/arch/arm/dts/imx6ull-colibri.dts @@ -3,602 +3,10 @@ * Copyright 2018-2019 Toradex AG */

-/dts-v1/; -#include <dt-bindings/gpio/gpio.h> -#include "imx6ull.dtsi" +#include "imx6ull-colibri.dtsi" +#include "imx6ull-colibri-u-boot.dtsi"

/ { model = "Toradex Colibri iMX6ULL"; compatible = "toradex,colibri-imx6ull", "fsl,imx6ull"; - - aliases { - mmc0 = &usdhc1; - usb0 = &usbotg1; /* required for ums */ - }; - - chosen { - stdout-path = &uart1; - }; - - reg_module_3v3: regulator-module-3v3 { - compatible = "regulator-fixed"; - regulator-always-on; - regulator-name = "+V3.3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - - reg_module_3v3_avdd: regulator-module-3v3-avdd { - compatible = "regulator-fixed"; - regulator-always-on; - regulator-name = "+V3.3_AVDD_AUDIO"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - - reg_5v0: regulator-5v0 { - compatible = "regulator-fixed"; - regulator-name = "5V"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - }; - - reg_sd1_vmmc: regulator-sd1-vmmc { - compatible = "regulator-gpio"; - gpio = <&gpio5 9 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_snvs_reg_sd>; - regulator-always-on; - regulator-name = "+V3.3_1.8_SD"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - states = <1800000 0x1 3300000 0x0>; - vin-supply = <&reg_module_3v3>; - }; - - reg_usbh_vbus: regulator-usbh-vbus { - compatible = "regulator-fixed"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usbh_reg>; - regulator-name = "VCC_USB[1-4]"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio1 2 GPIO_ACTIVE_LOW>; /* USBH_PEN */ - vin-supply = <&reg_5v0>; - }; -}; - -&adc1 { - num-channels = <10>; - vref-supply = <&reg_module_3v3_avdd>; -}; - -/* Colibri SPI */ -&ecspi1 { - cs-gpios = <&gpio3 26 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_ecspi1 &pinctrl_ecspi1_cs>; -}; - -/* Ethernet */ -&fec2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_enet2>; - phy-mode = "rmii"; - phy-handle = <&ethphy1>; - status = "okay"; - - mdio { - #address-cells = <1>; - #size-cells = <0>; - - ethphy1: ethernet-phy@2 { - compatible = "ethernet-phy-ieee802.3-c22"; - max-speed = <100>; - reg = <2>; - }; - }; -}; - -/* NAND */ -&gpmi { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_gpmi_nand>; - nand-on-flash-bbt; - nand-ecc-mode = "hw"; - nand-ecc-strength = <8>; - nand-ecc-step-size = <512>; - status = "okay"; -}; - -/* - * I2C3_SDA/SCL on SODIMM 194/196 (e.g. RTC on carrier board) - */ -&i2c1 { - pinctrl-names = "default", "gpio"; - pinctrl-0 = <&pinctrl_i2c1>; - pinctrl-1 = <&pinctrl_i2c1_gpio>; - sda-gpios = <&gpio1 29 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - scl-gpios = <&gpio1 28 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - status = "okay"; -}; - -/* - * PWR_I2C: power I2C to audio codec, PMIC, temperature sensor and - * touch screen controller - */ -&i2c2 { - pinctrl-names = "default", "gpio"; - pinctrl-0 = <&pinctrl_i2c2>; - pinctrl-1 = <&pinctrl_i2c2_gpio>; - sda-gpios = <&gpio1 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - scl-gpios = <&gpio1 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - status = "okay"; - - ad7879@2c { - compatible = "adi,ad7879-1"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_snvs_ad7879_int>; - reg = <0x2c>; - interrupt-parent = <&gpio5>; - interrupts = <7 IRQ_TYPE_EDGE_FALLING>; - touchscreen-max-pressure = <4096>; - adi,resistance-plate-x = <120>; - adi,first-conversion-delay = /bits/ 8 <3>; - adi,acquisition-time = /bits/ 8 <1>; - adi,median-filter-size = /bits/ 8 <2>; - adi,averaging = /bits/ 8 <1>; - adi,conversion-interval = /bits/ 8 <255>; - }; -}; - -&lcdif { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_lcdif_dat - &pinctrl_lcdif_ctrl>; -}; - -/* PWM <A> */ -&pwm4 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_pwm4>; - #pwm-cells = <3>; -}; - -/* PWM <B> */ -&pwm5 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_pwm5>; - #pwm-cells = <3>; -}; - -/* PWM <C> */ -&pwm6 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_pwm6>; - #pwm-cells = <3>; -}; - -/* PWM <D> */ -&pwm7 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_pwm7>; - #pwm-cells = <3>; -}; - -&sdma { - status = "okay"; -}; - -&snvs_pwrkey { - status = "disabled"; -}; - -/* Colibri UART_A */ -&uart1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart1 &pinctrl_uart1_ctrl1>; - uart-has-rtscts; - fsl,dte-mode; - status = "okay"; -}; - -/* Colibri UART_B */ -&uart2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart2>; - uart-has-rtscts; - fsl,dte-mode; -}; - -/* Colibri UART_C */ -&uart5 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart5>; - fsl,dte-mode; -}; - -/* Colibri USBC */ -&usbotg1 { - dr_mode = "host"; - srp-disable; - hnp-disable; - adp-disable; - status = "okay"; -}; - -/* Colibri USBH */ -&usbotg2 { - dr_mode = "host"; - vbus-supply = <&reg_usbh_vbus>; - status = "okay"; -}; - -/* Colibri MMC */ -&usdhc1 { - assigned-clocks = <&clks IMX6UL_CLK_USDHC1_SEL>, <&clks IMX6UL_CLK_USDHC1>; - assigned-clock-parents = <&clks IMX6UL_CLK_PLL2_PFD2>; - assigned-clock-rates = <0>, <198000000>; - cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>; /* MMC_CD */ - pinctrl-names = "default", "state_100mhz", "state_200mhz"; - pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_snvs_usdhc1_cd>; - pinctrl-1 = <&pinctrl_usdhc1_100mhz>; - pinctrl-2 = <&pinctrl_usdhc1_200mhz>; - vmmc-supply = <&reg_sd1_vmmc>; - status = "okay"; -}; - -&iomuxc { - pinctrl_can_int: canint-grp { - fsl,pins = < - /* SODIMM 73 */ - MX6UL_PAD_ENET1_TX_DATA1__GPIO2_IO04 0X14 - >; - }; - - pinctrl_enet2: enet2-grp { - fsl,pins = < - MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0 - MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0 - MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0 - MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0 - MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0 - MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER 0x1b0b0 - MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4001b031 - MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0 - MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0 - MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0 - >; - }; - - pinctrl_ecspi1_cs: ecspi1-cs-grp { - fsl,pins = < - MX6UL_PAD_LCD_DATA21__GPIO3_IO26 0x000a0 - >; - }; - - pinctrl_ecspi1: ecspi1-grp { - fsl,pins = < - MX6UL_PAD_LCD_DATA20__ECSPI1_SCLK 0x000a0 - MX6UL_PAD_LCD_DATA22__ECSPI1_MOSI 0x000a0 - MX6UL_PAD_LCD_DATA23__ECSPI1_MISO 0x100a0 - >; - }; - - pinctrl_flexcan2: flexcan2-grp { - fsl,pins = < - MX6UL_PAD_ENET1_TX_DATA0__FLEXCAN2_RX 0x1b020 - MX6UL_PAD_ENET1_RX_EN__FLEXCAN2_TX 0x1b020 - >; - }; - - pinctrl_gpio_bl_on: gpio-bl-on-grp { - fsl,pins = < - MX6UL_PAD_JTAG_TMS__GPIO1_IO11 0x000a0 - >; - }; - - pinctrl_gpio1: gpio1-grp { - fsl,pins = < - MX6UL_PAD_ENET1_RX_DATA0__GPIO2_IO00 0x74 /* SODIMM 55 */ - MX6UL_PAD_ENET1_RX_DATA1__GPIO2_IO01 0x74 /* SODIMM 63 */ - MX6UL_PAD_UART3_RX_DATA__GPIO1_IO25 0X14 /* SODIMM 77 */ - MX6UL_PAD_JTAG_TCK__GPIO1_IO14 0x14 /* SODIMM 99 */ - MX6UL_PAD_NAND_CE1_B__GPIO4_IO14 0x14 /* SODIMM 133 */ - MX6UL_PAD_UART3_TX_DATA__GPIO1_IO24 0x14 /* SODIMM 135 */ - MX6UL_PAD_UART3_CTS_B__GPIO1_IO26 0x14 /* SODIMM 100 */ - MX6UL_PAD_JTAG_TRST_B__GPIO1_IO15 0x14 /* SODIMM 102 */ - MX6UL_PAD_ENET1_RX_ER__GPIO2_IO07 0x14 /* SODIMM 104 */ - MX6UL_PAD_UART3_RTS_B__GPIO1_IO27 0x14 /* SODIMM 186 */ - >; - }; - - pinctrl_gpio2: gpio2-grp { /* Camera */ - fsl,pins = < - MX6UL_PAD_CSI_DATA04__GPIO4_IO25 0x74 /* SODIMM 69 */ - MX6UL_PAD_CSI_MCLK__GPIO4_IO17 0x14 /* SODIMM 75 */ - MX6UL_PAD_CSI_DATA06__GPIO4_IO27 0x14 /* SODIMM 85 */ - MX6UL_PAD_CSI_PIXCLK__GPIO4_IO18 0x14 /* SODIMM 96 */ - MX6UL_PAD_CSI_DATA05__GPIO4_IO26 0x14 /* SODIMM 98 */ - >; - }; - - pinctrl_gpio3: gpio3-grp { /* CAN2 */ - fsl,pins = < - MX6UL_PAD_ENET1_RX_EN__GPIO2_IO02 0x14 /* SODIMM 178 */ - MX6UL_PAD_ENET1_TX_DATA0__GPIO2_IO03 0x14 /* SODIMM 188 */ - >; - }; - - pinctrl_gpio4: gpio4-grp { - fsl,pins = < - MX6UL_PAD_CSI_DATA07__GPIO4_IO28 0x74 /* SODIMM 65 */ - >; - }; - - pinctrl_gpio5: gpio5-grp { /* ATMEL MXT TOUCH */ - fsl,pins = < - MX6UL_PAD_JTAG_MOD__GPIO1_IO10 0x74 /* SODIMM 106 */ - >; - }; - - pinctrl_gpio6: gpio6-grp { /* Wifi pins */ - fsl,pins = < - MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0x14 /* SODIMM 89 */ - MX6UL_PAD_CSI_DATA02__GPIO4_IO23 0x14 /* SODIMM 79 */ - MX6UL_PAD_CSI_VSYNC__GPIO4_IO19 0x14 /* SODIMM 81 */ - MX6UL_PAD_CSI_DATA03__GPIO4_IO24 0x14 /* SODIMM 97 */ - MX6UL_PAD_CSI_DATA00__GPIO4_IO21 0x14 /* SODIMM 101 */ - MX6UL_PAD_CSI_DATA01__GPIO4_IO22 0x14 /* SODIMM 103 */ - MX6UL_PAD_CSI_HSYNC__GPIO4_IO20 0x14 /* SODIMM 94 */ - >; - }; - - pinctrl_gpmi_nand: gpmi-nand-grp { - fsl,pins = < - MX6UL_PAD_NAND_DATA00__RAWNAND_DATA00 0x100a9 - MX6UL_PAD_NAND_DATA01__RAWNAND_DATA01 0x100a9 - MX6UL_PAD_NAND_DATA02__RAWNAND_DATA02 0x100a9 - MX6UL_PAD_NAND_DATA03__RAWNAND_DATA03 0x100a9 - MX6UL_PAD_NAND_DATA04__RAWNAND_DATA04 0x100a9 - MX6UL_PAD_NAND_DATA05__RAWNAND_DATA05 0x100a9 - MX6UL_PAD_NAND_DATA06__RAWNAND_DATA06 0x100a9 - MX6UL_PAD_NAND_DATA07__RAWNAND_DATA07 0x100a9 - MX6UL_PAD_NAND_CLE__RAWNAND_CLE 0x100a9 - MX6UL_PAD_NAND_ALE__RAWNAND_ALE 0x100a9 - MX6UL_PAD_NAND_RE_B__RAWNAND_RE_B 0x100a9 - MX6UL_PAD_NAND_WE_B__RAWNAND_WE_B 0x100a9 - MX6UL_PAD_NAND_CE0_B__RAWNAND_CE0_B 0x100a9 - MX6UL_PAD_NAND_READY_B__RAWNAND_READY_B 0x100a9 - >; - }; - - pinctrl_i2c1: i2c1-grp { - fsl,pins = < - MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0 - MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0 - >; - }; - - pinctrl_i2c1_gpio: i2c1-gpio-grp { - fsl,pins = < - MX6UL_PAD_UART4_TX_DATA__GPIO1_IO28 0x4001b8b0 - MX6UL_PAD_UART4_RX_DATA__GPIO1_IO29 0x4001b8b0 - >; - }; - - pinctrl_i2c2: i2c2-grp { - fsl,pins = < - MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0 - MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001b8b0 - >; - }; - - pinctrl_i2c2_gpio: i2c2-gpio-grp { - fsl,pins = < - MX6UL_PAD_UART5_TX_DATA__GPIO1_IO30 0x4001b8b0 - MX6UL_PAD_UART5_RX_DATA__GPIO1_IO31 0x4001b8b0 - >; - }; - - pinctrl_lcdif_dat: lcdif-dat-grp { - fsl,pins = < - MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x00079 - MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x00079 - MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x00079 - MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x00079 - MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x00079 - MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x00079 - MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x00079 - MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x00079 - MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x00079 - MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x00079 - MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x00079 - MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x00079 - MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x00079 - MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x00079 - MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x00079 - MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x00079 - MX6UL_PAD_LCD_DATA16__LCDIF_DATA16 0x00079 - MX6UL_PAD_LCD_DATA17__LCDIF_DATA17 0x00079 - >; - }; - - pinctrl_lcdif_ctrl: lcdif-ctrl-grp { - fsl,pins = < - MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x00079 - MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x00079 - MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x00079 - MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x00079 - >; - }; - - pinctrl_pwm4: pwm4-grp { - fsl,pins = < - MX6UL_PAD_NAND_WP_B__PWM4_OUT 0x00079 - >; - }; - - pinctrl_pwm5: pwm5-grp { - fsl,pins = < - MX6UL_PAD_NAND_DQS__PWM5_OUT 0x00079 - >; - }; - - pinctrl_pwm6: pwm6-grp { - fsl,pins = < - MX6UL_PAD_ENET1_TX_EN__PWM6_OUT 0x00079 - >; - }; - - pinctrl_pwm7: pwm7-grp { - fsl,pins = < - MX6UL_PAD_ENET1_TX_CLK__PWM7_OUT 0x00079 - >; - }; - - pinctrl_uart1: uart1-grp { - fsl,pins = < - MX6UL_PAD_UART1_TX_DATA__UART1_DTE_RX 0x1b0b1 - MX6UL_PAD_UART1_RX_DATA__UART1_DTE_TX 0x1b0b1 - MX6UL_PAD_UART1_RTS_B__UART1_DTE_CTS 0x1b0b1 - MX6UL_PAD_UART1_CTS_B__UART1_DTE_RTS 0x1b0b1 - >; - }; - - pinctrl_uart1_ctrl1: uart1-ctrl1-grp { /* Additional DTR, DCD */ - fsl,pins = < - MX6UL_PAD_JTAG_TDI__GPIO1_IO13 0x1b0b1 /* DCD */ - MX6UL_PAD_LCD_DATA18__GPIO3_IO23 0x1b0b1 /* DSR */ - MX6UL_PAD_JTAG_TDO__GPIO1_IO12 0x1b0b1 /* DTR */ - MX6UL_PAD_LCD_DATA19__GPIO3_IO24 0x1b0b1 /* RI */ - >; - }; - - pinctrl_uart2: uart2-grp { - fsl,pins = < - MX6UL_PAD_UART2_TX_DATA__UART2_DTE_RX 0x1b0b1 - MX6UL_PAD_UART2_RX_DATA__UART2_DTE_TX 0x1b0b1 - MX6UL_PAD_UART2_CTS_B__UART2_DTE_RTS 0x1b0b1 - MX6UL_PAD_UART2_RTS_B__UART2_DTE_CTS 0x1b0b1 - >; - }; - pinctrl_uart5: uart5-grp { - fsl,pins = < - MX6UL_PAD_GPIO1_IO04__UART5_DTE_RX 0x1b0b1 - MX6UL_PAD_GPIO1_IO05__UART5_DTE_TX 0x1b0b1 - >; - }; - - pinctrl_usbh_reg: gpio-usbh-reg { - fsl,pins = < - MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0x1b0b1 /* SODIMM 129 USBH PEN */ - >; - }; - - pinctrl_usdhc1: usdhc1-grp { - fsl,pins = < - MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x17059 - MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x10059 - MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059 - MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059 - MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059 - MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059 - >; - }; - - pinctrl_usdhc1_100mhz: usdhc1-100mhz-grp { - fsl,pins = < - MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x170b9 - MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x100b9 - MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9 - MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9 - MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9 - MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9 - >; - }; - - pinctrl_usdhc1_200mhz: usdhc1-200mhz-grp { - fsl,pins = < - MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x170f9 - MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x100f9 - MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9 - MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9 - MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9 - MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9 - >; - }; - - pinctrl_usdhc2: usdhc2-grp { - fsl,pins = < - MX6UL_PAD_CSI_DATA00__USDHC2_DATA0 0x17059 - MX6UL_PAD_CSI_DATA01__USDHC2_DATA1 0x17059 - MX6UL_PAD_CSI_DATA02__USDHC2_DATA2 0x17059 - MX6UL_PAD_CSI_DATA03__USDHC2_DATA3 0x17059 - MX6UL_PAD_CSI_HSYNC__USDHC2_CMD 0x17059 - MX6UL_PAD_CSI_VSYNC__USDHC2_CLK 0x17059 - - MX6UL_PAD_GPIO1_IO03__OSC32K_32K_OUT 0x14 - >; - }; -}; - -&iomuxc_snvs { - pinctrl_snvs_gpio1: snvs-gpio1-grp { - fsl,pins = < - MX6ULL_PAD_SNVS_TAMPER6__GPIO5_IO06 0x14 /* SODIMM 93 */ - MX6ULL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x14 /* SODIMM 95 */ - MX6ULL_PAD_BOOT_MODE0__GPIO5_IO10 0x74 /* SODIMM 105 */ - MX6ULL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x14 /* SODIMM 131 USBH OC */ - MX6ULL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x74 /* SODIMM 138 */ - >; - }; - - pinctrl_snvs_gpio2: snvs-gpio2-grp { /* ATMEL MXT TOUCH */ - fsl,pins = < - MX6ULL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x74 /* SODIMM 107 */ - >; - }; - - pinctrl_snvs_gpio3: snvs-gpio3-grp { /* Wifi pins */ - fsl,pins = < - MX6ULL_PAD_BOOT_MODE1__GPIO5_IO11 0x14 /* SODIMM 127 */ - >; - }; - - pinctrl_snvs_ad7879_int: snvs-ad7879-int-grp { /* TOUCH Interrupt */ - fsl,pins = < - MX6ULL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x1b0b0 - >; - }; - - pinctrl_snvs_reg_sd: snvs-reg-sd-grp { - fsl,pins = < - MX6ULL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x4001b8b0 - >; - }; - - pinctrl_snvs_usbc_det: snvs-usbc-det-grp { - fsl,pins = < - MX6ULL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x1b0b0 - >; - }; - - pinctrl_snvs_gpiokeys: snvs-gpiokeys-grp { - fsl,pins = < - MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x130b0 - >; - }; - - pinctrl_snvs_usdhc1_cd: snvs-usdhc1-cd-grp { - fsl,pins = < - MX6ULL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x1b0b0 /* CD */ - >; - }; - - pinctrl_snvs_wifi_pdn: snvs-wifi-pdn-grp { - fsl,pins = < - MX6ULL_PAD_BOOT_MODE1__GPIO5_IO11 0x14 - >; - }; }; diff --git a/arch/arm/dts/imx6ull-colibri.dtsi b/arch/arm/dts/imx6ull-colibri.dtsi new file mode 100644 index 0000000000..01d5e27aea --- /dev/null +++ b/arch/arm/dts/imx6ull-colibri.dtsi @@ -0,0 +1,641 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2019 Toradex AG + */ + +/dts-v1/; +#include <dt-bindings/gpio/gpio.h> +#include "imx6ull.dtsi" + +/ { + aliases { + mmc0 = &usdhc1; + usb0 = &usbotg1; /* required for ums */ + }; + + chosen { + stdout-path = &uart1; + }; + + reg_module_3v3: regulator-module-3v3 { + compatible = "regulator-fixed"; + regulator-always-on; + regulator-name = "+V3.3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + reg_module_3v3_avdd: regulator-module-3v3-avdd { + compatible = "regulator-fixed"; + regulator-always-on; + regulator-name = "+V3.3_AVDD_AUDIO"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + reg_5v0: regulator-5v0 { + compatible = "regulator-fixed"; + regulator-name = "5V"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; + + reg_sd1_vmmc: regulator-sd1-vmmc { + compatible = "regulator-gpio"; + gpio = <&gpio5 9 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_snvs_reg_sd>; + regulator-always-on; + regulator-name = "+V3.3_1.8_SD"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + states = <1800000 0x1 3300000 0x0>; + vin-supply = <&reg_module_3v3>; + }; + + reg_usbh_vbus: regulator-usbh-vbus { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbh_reg>; + regulator-name = "VCC_USB[1-4]"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio1 2 GPIO_ACTIVE_LOW>; /* USBH_PEN */ + vin-supply = <&reg_5v0>; + }; +}; + +&adc1 { + num-channels = <10>; + vref-supply = <&reg_module_3v3_avdd>; +}; + +/* Colibri SPI */ +&ecspi1 { + cs-gpios = <&gpio3 26 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi1 &pinctrl_ecspi1_cs>; +}; + +/* Ethernet */ +&fec2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet2>; + phy-mode = "rmii"; + phy-handle = <&ethphy1>; + status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + ethphy1: ethernet-phy@2 { + compatible = "ethernet-phy-ieee802.3-c22"; + max-speed = <100>; + reg = <2>; + }; + }; +}; + +/* NAND */ +&gpmi { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpmi_nand>; + nand-on-flash-bbt; + nand-ecc-mode = "hw"; + nand-ecc-strength = <8>; + nand-ecc-step-size = <512>; + status = "okay"; +}; + +/* + * I2C3_SDA/SCL on SODIMM 194/196 (e.g. RTC on carrier board) + */ +&i2c1 { + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c1>; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + sda-gpios = <&gpio1 29 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + scl-gpios = <&gpio1 28 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + status = "okay"; +}; + +/* + * PWR_I2C: power I2C to audio codec, PMIC, temperature sensor and + * touch screen controller + */ +&i2c2 { + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c2>; + pinctrl-1 = <&pinctrl_i2c2_gpio>; + sda-gpios = <&gpio1 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + scl-gpios = <&gpio1 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + status = "okay"; + + ad7879@2c { + compatible = "adi,ad7879-1"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_snvs_ad7879_int>; + reg = <0x2c>; + interrupt-parent = <&gpio5>; + interrupts = <7 IRQ_TYPE_EDGE_FALLING>; + touchscreen-max-pressure = <4096>; + adi,resistance-plate-x = <120>; + adi,first-conversion-delay = /bits/ 8 <3>; + adi,acquisition-time = /bits/ 8 <1>; + adi,median-filter-size = /bits/ 8 <2>; + adi,averaging = /bits/ 8 <1>; + adi,conversion-interval = /bits/ 8 <255>; + }; +}; + +&lcdif { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lcdif_dat + &pinctrl_lcdif_ctrl>; +}; + +/* PWM <A> */ +&pwm4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm4>; + #pwm-cells = <3>; +}; + +/* PWM <B> */ +&pwm5 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm5>; + #pwm-cells = <3>; +}; + +/* PWM <C> */ +&pwm6 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm6>; + #pwm-cells = <3>; +}; + +/* PWM <D> */ +&pwm7 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm7>; + #pwm-cells = <3>; +}; + +&sdma { + status = "okay"; +}; + +&snvs_pwrkey { + status = "disabled"; +}; + +/* Colibri UART_A */ +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1 &pinctrl_uart1_ctrl1>; + uart-has-rtscts; + fsl,dte-mode; + status = "okay"; +}; + +/* Colibri UART_B */ +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2>; + uart-has-rtscts; + fsl,dte-mode; +}; + +/* Colibri UART_C */ +&uart5 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart5>; + fsl,dte-mode; +}; + +/* Colibri USBC */ +&usbotg1 { + dr_mode = "host"; + srp-disable; + hnp-disable; + adp-disable; + status = "okay"; +}; + +/* Colibri USBH */ +&usbotg2 { + dr_mode = "host"; + vbus-supply = <&reg_usbh_vbus>; + status = "okay"; +}; + +/* Colibri MMC */ +&usdhc1 { + assigned-clocks = <&clks IMX6UL_CLK_USDHC1_SEL>, + <&clks IMX6UL_CLK_USDHC1>; + assigned-clock-parents = <&clks IMX6UL_CLK_PLL2_PFD2>; + assigned-clock-rates = <0>, <198000000>; + cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>; /* MMC_CD */ + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_snvs_usdhc1_cd>; + pinctrl-1 = <&pinctrl_usdhc1_100mhz>; + pinctrl-2 = <&pinctrl_usdhc1_200mhz>; + vmmc-supply = <&reg_sd1_vmmc>; + status = "okay"; +}; + +&iomuxc { + pinctrl_can_int: canint-grp { + fsl,pins = < + /* SODIMM 73 */ + MX6UL_PAD_ENET1_TX_DATA1__GPIO2_IO04 0X14 + >; + }; + + pinctrl_enet2: enet2-grp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0 + MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0 + MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0 + MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0 + MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0 + MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER 0x1b0b0 + MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4001b031 + MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0 + MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0 + MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0 + >; + }; + + pinctrl_ecspi1_cs: ecspi1-cs-grp { + fsl,pins = < + MX6UL_PAD_LCD_DATA21__GPIO3_IO26 0x000a0 + >; + }; + + pinctrl_ecspi1: ecspi1-grp { + fsl,pins = < + MX6UL_PAD_LCD_DATA20__ECSPI1_SCLK 0x000a0 + MX6UL_PAD_LCD_DATA22__ECSPI1_MOSI 0x000a0 + MX6UL_PAD_LCD_DATA23__ECSPI1_MISO 0x100a0 + >; + }; + + pinctrl_flexcan2: flexcan2-grp { + fsl,pins = < + MX6UL_PAD_ENET1_TX_DATA0__FLEXCAN2_RX 0x1b020 + MX6UL_PAD_ENET1_RX_EN__FLEXCAN2_TX 0x1b020 + >; + }; + + pinctrl_gpio_bl_on: gpio-bl-on-grp { + fsl,pins = < + MX6UL_PAD_JTAG_TMS__GPIO1_IO11 0x000a0 + >; + }; + + pinctrl_gpio1: gpio1-grp { + fsl,pins = < + /* SODIMM 55 */ + MX6UL_PAD_ENET1_RX_DATA0__GPIO2_IO00 0x74 + /* SODIMM 63 */ + MX6UL_PAD_ENET1_RX_DATA1__GPIO2_IO01 0x74 + /* SODIMM 77 */ + MX6UL_PAD_UART3_RX_DATA__GPIO1_IO25 0X14 + /* SODIMM 99 */ + MX6UL_PAD_JTAG_TCK__GPIO1_IO14 0x14 + /* SODIMM 133 */ + MX6UL_PAD_NAND_CE1_B__GPIO4_IO14 0x14 + /* SODIMM 135 */ + MX6UL_PAD_UART3_TX_DATA__GPIO1_IO24 0x14 + /* SODIMM 100 */ + MX6UL_PAD_UART3_CTS_B__GPIO1_IO26 0x14 + /* SODIMM 102 */ + MX6UL_PAD_JTAG_TRST_B__GPIO1_IO15 0x14 + /* SODIMM 104 */ + MX6UL_PAD_ENET1_RX_ER__GPIO2_IO07 0x14 + /* SODIMM 186 */ + MX6UL_PAD_UART3_RTS_B__GPIO1_IO27 0x14 + >; + }; + + pinctrl_gpio2: gpio2-grp { /* Camera */ + fsl,pins = < + /* SODIMM 69 */ + MX6UL_PAD_CSI_DATA04__GPIO4_IO25 0x74 + /* SODIMM 75 */ + MX6UL_PAD_CSI_MCLK__GPIO4_IO17 0x14 + /* SODIMM 85 */ + MX6UL_PAD_CSI_DATA06__GPIO4_IO27 0x14 + /* SODIMM 96 */ + MX6UL_PAD_CSI_PIXCLK__GPIO4_IO18 0x14 + /* SODIMM 98 */ + MX6UL_PAD_CSI_DATA05__GPIO4_IO26 0x14 + >; + }; + + pinctrl_gpio3: gpio3-grp { /* CAN2 */ + fsl,pins = < + /* SODIMM 178 */ + MX6UL_PAD_ENET1_RX_EN__GPIO2_IO02 0x14 + /* SODIMM 188 */ + MX6UL_PAD_ENET1_TX_DATA0__GPIO2_IO03 0x14 + >; + }; + + pinctrl_gpio4: gpio4-grp { + fsl,pins = < + /* SODIMM 65 */ + MX6UL_PAD_CSI_DATA07__GPIO4_IO28 0x74 + >; + }; + + pinctrl_gpio5: gpio5-grp { /* ATMEL MXT TOUCH */ + fsl,pins = < + /* SODIMM 106 */ + MX6UL_PAD_JTAG_MOD__GPIO1_IO10 0x74 + >; + }; + + pinctrl_gpio6: gpio6-grp { /* Wifi pins */ + fsl,pins = < + /* SODIMM 89 */ + MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0x14 + /* SODIMM 79 */ + MX6UL_PAD_CSI_DATA02__GPIO4_IO23 0x14 + /* SODIMM 81 */ + MX6UL_PAD_CSI_VSYNC__GPIO4_IO19 0x14 + /* SODIMM 97 */ + MX6UL_PAD_CSI_DATA03__GPIO4_IO24 0x14 + /* SODIMM 101 */ + MX6UL_PAD_CSI_DATA00__GPIO4_IO21 0x14 + /* SODIMM 103 */ + MX6UL_PAD_CSI_DATA01__GPIO4_IO22 0x14 + /* SODIMM 94 */ + MX6UL_PAD_CSI_HSYNC__GPIO4_IO20 0x14 + >; + }; + + pinctrl_gpmi_nand: gpmi-nand-grp { + fsl,pins = < + MX6UL_PAD_NAND_DATA00__RAWNAND_DATA00 0x100a9 + MX6UL_PAD_NAND_DATA01__RAWNAND_DATA01 0x100a9 + MX6UL_PAD_NAND_DATA02__RAWNAND_DATA02 0x100a9 + MX6UL_PAD_NAND_DATA03__RAWNAND_DATA03 0x100a9 + MX6UL_PAD_NAND_DATA04__RAWNAND_DATA04 0x100a9 + MX6UL_PAD_NAND_DATA05__RAWNAND_DATA05 0x100a9 + MX6UL_PAD_NAND_DATA06__RAWNAND_DATA06 0x100a9 + MX6UL_PAD_NAND_DATA07__RAWNAND_DATA07 0x100a9 + MX6UL_PAD_NAND_CLE__RAWNAND_CLE 0x100a9 + MX6UL_PAD_NAND_ALE__RAWNAND_ALE 0x100a9 + MX6UL_PAD_NAND_RE_B__RAWNAND_RE_B 0x100a9 + MX6UL_PAD_NAND_WE_B__RAWNAND_WE_B 0x100a9 + MX6UL_PAD_NAND_CE0_B__RAWNAND_CE0_B 0x100a9 + MX6UL_PAD_NAND_READY_B__RAWNAND_READY_B 0x100a9 + >; + }; + + pinctrl_i2c1: i2c1-grp { + fsl,pins = < + MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0 + MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0 + >; + }; + + pinctrl_i2c1_gpio: i2c1-gpio-grp { + fsl,pins = < + MX6UL_PAD_UART4_TX_DATA__GPIO1_IO28 0x4001b8b0 + MX6UL_PAD_UART4_RX_DATA__GPIO1_IO29 0x4001b8b0 + >; + }; + + pinctrl_i2c2: i2c2-grp { + fsl,pins = < + MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0 + MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001b8b0 + >; + }; + + pinctrl_i2c2_gpio: i2c2-gpio-grp { + fsl,pins = < + MX6UL_PAD_UART5_TX_DATA__GPIO1_IO30 0x4001b8b0 + MX6UL_PAD_UART5_RX_DATA__GPIO1_IO31 0x4001b8b0 + >; + }; + + pinctrl_lcdif_dat: lcdif-dat-grp { + fsl,pins = < + MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x00079 + MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x00079 + MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x00079 + MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x00079 + MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x00079 + MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x00079 + MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x00079 + MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x00079 + MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x00079 + MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x00079 + MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x00079 + MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x00079 + MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x00079 + MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x00079 + MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x00079 + MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x00079 + MX6UL_PAD_LCD_DATA16__LCDIF_DATA16 0x00079 + MX6UL_PAD_LCD_DATA17__LCDIF_DATA17 0x00079 + >; + }; + + pinctrl_lcdif_ctrl: lcdif-ctrl-grp { + fsl,pins = < + MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x00079 + MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x00079 + MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x00079 + MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x00079 + >; + }; + + pinctrl_pwm4: pwm4-grp { + fsl,pins = < + MX6UL_PAD_NAND_WP_B__PWM4_OUT 0x00079 + >; + }; + + pinctrl_pwm5: pwm5-grp { + fsl,pins = < + MX6UL_PAD_NAND_DQS__PWM5_OUT 0x00079 + >; + }; + + pinctrl_pwm6: pwm6-grp { + fsl,pins = < + MX6UL_PAD_ENET1_TX_EN__PWM6_OUT 0x00079 + >; + }; + + pinctrl_pwm7: pwm7-grp { + fsl,pins = < + MX6UL_PAD_ENET1_TX_CLK__PWM7_OUT 0x00079 + >; + }; + + pinctrl_uart1: uart1-grp { + fsl,pins = < + MX6UL_PAD_UART1_TX_DATA__UART1_DTE_RX 0x1b0b1 + MX6UL_PAD_UART1_RX_DATA__UART1_DTE_TX 0x1b0b1 + MX6UL_PAD_UART1_RTS_B__UART1_DTE_CTS 0x1b0b1 + MX6UL_PAD_UART1_CTS_B__UART1_DTE_RTS 0x1b0b1 + >; + }; + + pinctrl_uart1_ctrl1: uart1-ctrl1-grp { /* Additional DTR, DCD */ + fsl,pins = < + /* DCD */ + MX6UL_PAD_JTAG_TDI__GPIO1_IO13 0x1b0b1 + /* DSR */ + MX6UL_PAD_LCD_DATA18__GPIO3_IO23 0x1b0b1 + /* DTR */ + MX6UL_PAD_JTAG_TDO__GPIO1_IO12 0x1b0b1 + /* RI */ + MX6UL_PAD_LCD_DATA19__GPIO3_IO24 0x1b0b1 + >; + }; + + pinctrl_uart2: uart2-grp { + fsl,pins = < + MX6UL_PAD_UART2_TX_DATA__UART2_DTE_RX 0x1b0b1 + MX6UL_PAD_UART2_RX_DATA__UART2_DTE_TX 0x1b0b1 + MX6UL_PAD_UART2_CTS_B__UART2_DTE_RTS 0x1b0b1 + MX6UL_PAD_UART2_RTS_B__UART2_DTE_CTS 0x1b0b1 + >; + }; + pinctrl_uart5: uart5-grp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO04__UART5_DTE_RX 0x1b0b1 + MX6UL_PAD_GPIO1_IO05__UART5_DTE_TX 0x1b0b1 + >; + }; + + pinctrl_usbh_reg: gpio-usbh-reg { + fsl,pins = < + /* SODIMM 129 USBH PEN */ + MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0x1b0b1 + >; + }; + + pinctrl_usdhc1: usdhc1-grp { + fsl,pins = < + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x17059 + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x10059 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059 + >; + }; + + pinctrl_usdhc1_100mhz: usdhc1-100mhz-grp { + fsl,pins = < + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x170b9 + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x100b9 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9 + >; + }; + + pinctrl_usdhc1_200mhz: usdhc1-200mhz-grp { + fsl,pins = < + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x170f9 + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x100f9 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9 + >; + }; + + pinctrl_usdhc2: usdhc2-grp { + fsl,pins = < + MX6UL_PAD_CSI_DATA00__USDHC2_DATA0 0x17059 + MX6UL_PAD_CSI_DATA01__USDHC2_DATA1 0x17059 + MX6UL_PAD_CSI_DATA02__USDHC2_DATA2 0x17059 + MX6UL_PAD_CSI_DATA03__USDHC2_DATA3 0x17059 + MX6UL_PAD_CSI_HSYNC__USDHC2_CMD 0x17059 + MX6UL_PAD_CSI_VSYNC__USDHC2_CLK 0x17059 + + MX6UL_PAD_GPIO1_IO03__OSC32K_32K_OUT 0x14 + >; + }; +}; + +&iomuxc_snvs { + pinctrl_snvs_gpio1: snvs-gpio1-grp { + fsl,pins = < + /* SODIMM 93 */ + MX6ULL_PAD_SNVS_TAMPER6__GPIO5_IO06 0x14 + /* SODIMM 95 */ + MX6ULL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x14 + /* SODIMM 105 */ + MX6ULL_PAD_BOOT_MODE0__GPIO5_IO10 0x74 + /* SODIMM 131 USBH OC */ + MX6ULL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x14 + /* SODIMM 138 */ + MX6ULL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x74 + >; + }; + + pinctrl_snvs_gpio2: snvs-gpio2-grp { /* ATMEL MXT TOUCH */ + fsl,pins = < + /* SODIMM 107 */ + MX6ULL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x74 + >; + }; + + pinctrl_snvs_gpio3: snvs-gpio3-grp { /* Wifi pins */ + fsl,pins = < + /* SODIMM 127 */ + MX6ULL_PAD_BOOT_MODE1__GPIO5_IO11 0x14 + >; + }; + + pinctrl_snvs_ad7879_int: snvs-ad7879-int-grp { /* TOUCH Interrupt */ + fsl,pins = < + MX6ULL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x1b0b0 + >; + }; + + pinctrl_snvs_reg_sd: snvs-reg-sd-grp { + fsl,pins = < + MX6ULL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x4001b8b0 + >; + }; + + pinctrl_snvs_usbc_det: snvs-usbc-det-grp { + fsl,pins = < + MX6ULL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x1b0b0 + >; + }; + + pinctrl_snvs_gpiokeys: snvs-gpiokeys-grp { + fsl,pins = < + MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x130b0 + >; + }; + + pinctrl_snvs_usdhc1_cd: snvs-usdhc1-cd-grp { + fsl,pins = < + /* CD */ + MX6ULL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x1b0b0 + >; + }; + + pinctrl_snvs_wifi_pdn: snvs-wifi-pdn-grp { + fsl,pins = < + MX6ULL_PAD_BOOT_MODE1__GPIO5_IO11 0x14 + >; + }; +}; diff --git a/board/toradex/colibri-imx6ull/MAINTAINERS b/board/toradex/colibri-imx6ull/MAINTAINERS index 626c1f94f9..c8199fa60a 100644 --- a/board/toradex/colibri-imx6ull/MAINTAINERS +++ b/board/toradex/colibri-imx6ull/MAINTAINERS @@ -4,6 +4,8 @@ W: http://developer.toradex.com/software/linux/linux-software W: https://www.toradex.com/community S: Maintained F: arch/arm/dts/imx6ull-colibri.dts +F: arch/arm/dts/imx6ull-colibri-u-boot.dtsi +F: arch/arm/dts/imx6ull-colibri.dtsi F: board/toradex/colibri-imx6ull/ F: configs/colibri-imx6ull_defconfig F: include/configs/colibri-imx6ull.h