Hi all
I'm working with zynqmp evalutation board (zcu102 revB) and currently I rely on FSBL generated by petalinux and I'm thinking of dropping it ans using u-boot's SPL. I have spent some time trying to configure and use SPL, but I've stuck on booting up the board.
I've prepared SD card as described here: http://lists.denx.de/pipermail/u-boot/2016-May/254902.html
Boot process has end with following message: <debug_uart> Debug uart enabled
U-Boot SPL 2016.07-rc3 (Jul 11 2016 - 13:13:28) EL Level: EL3 Trying to boot from MMC1 reading u-boot.bin "Synchronous Abort" handler, esr 0x96000010 ELR: fffc65d8 LR: fffc6530 x0 : 00000001ffff0eb0 x1 : 00000000ffff8181 x2 : 00000000ffff8ce8 x3 : 00000000ffff7ff0 x4 : 0000000000000000 x5 : 0000000000000000 x6 : 00000000ffff7d18 x7 : 000000000000000f x8 : 00000000ffff7b80 x9 : 0000000000000080 x10: 00000000ffff73f3 x11: 0000000000000000 x12: 00000000ffffffff x13: 00000000ffffffff x14: 00000000ffff7d6c x15: 00000000fffd34b0 x16: 665400000500c006 x17: d800b24018c0082c x18: 00000000ffff7e80 x19: 0000000000000058 x20: 00000000ffff8d30 x21: 00000000ffff8d30 x22: 0000000000000210 x23: 0000000000000200 x24: 00000000ffff7d18 x25: 00000000fffcf000 x26: 00000000fffd9b40 x27: 0000000000000001 x28: 8521b220c0c38d88 x29: 00000000ffff7200
Resetting CPU ...
resetting ...
I use u-boot 2016.07-rc3 with psu_init_gpl, which is also used in FSBL (and FSBL boot up board correctly). I suppose that the loading u-boot.bin to the RAM fails, because DDR controller is not initialized correctly. Probably I've forgotten enable something in .config, but I do not have idea what. Could somebody help me with this issue? If I forgot to add some information, please inform me.
BR, Adam Oleksy