Stephen,
On Mon, Dec 3, 2012 at 5:53 PM, Stephen Warren swarren@wwwdotorg.org wrote:
On 12/03/2012 04:45 PM, Tom Warren wrote:
This build is stripped down. It boots to the command prompt. GPIO is the only peripheral supported. Others TBD.
include/configs/tegra-common.h now holds common config options for Tegra SoCs.
diff --git a/board/nvidia/cardhu/cardhu.c b/board/nvidia/cardhu/cardhu.c
+void pinmux_init(void) +{
pinmux_config_table(tegra3_pinmux_common,ARRAY_SIZE(tegra3_pinmux_common));pinmux_config_table(unused_pins_lowpower,ARRAY_SIZE(unused_pins_lowpower));+}
Oh, I see. Is any of the pinmux configuration actually needed for just the UART to work? I suppose there's not much harm just setting up the whole configuration from the start rather than adding it piece-meal.
Yep, see previous reply for an explanation of why it's done in one shot.
diff --git a/board/nvidia/cardhu/pinmux-config-cardhu.h b/board/nvidia/cardhu/pinmux-config-cardhu.h
+static struct pingroup_config tegra3_pinmux_common[] = {
+#ifdef CONFIG_SND_HDA_CODEC_REALTEK
DEFAULT_PINMUX(SPDIF_IN, DAP2, DOWN, NORMAL, INPUT),+#else
DEFAULT_PINMUX(SPDIF_IN, SPDIF, NORMAL, NORMAL, INPUT),+#endif
I'm pretty sure that define will never be enabled; it was some temporary test thing that should be removed from our downstream kernel, which is where I assume you got this table from.
No, this came from one of our internal T30 U-Boot branches. Not sure where the OD (original dev) got it from.
I'll remove the REALTEK parts.
diff --git a/include/configs/cardhu.h b/include/configs/cardhu.h
diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h
+#define CONFIG_SYS_CPU_OSC_FREQUENCY 1000000 /* Set CPU clock to 1GHz */
Is that correct for Tegra30?
It was originally in tegra20-common.h, and was moved into tegra-common.h in a batch with other thought-to-be-non-HW-specific config defines.
Looking at the code, though, I don't see it used anywhere. It can be removed, either in V3 of this patchset or in a clean-up round of patches later once T30 is in.
+#define V_NS16550_CLK 216000000 /* 216MHz (pllp_out0) */
I thought PLL_P ran at 408MHz on Tegra30? The kernel certainly sets it up that way.
See my previous reply. In the internal U-Boot repo I ported from, PLLP was initially set to 216MHz, then sped up to 408MHz. When this first round of patches is in, I can address going to 408MHz first thing.
In this patch, you also should move MEM_LAYOUT_ENV_SETTINGS from tegra-common-post.h into tegraNN-common.h, or something like that.
I can do that, or we can wait until those settings are going to be used, i.e. once I've added peripheral support so a kernel can be found and loaded and executed.
Tom