Enable new features and provide require device-tree config so that U-Boot produces the correct ACPI tables on Coral.
Signed-off-by: Simon Glass sjg@chromium.org ---
arch/x86/dts/chromebook_coral.dts | 193 ++++++++++++++++++++++++++++- configs/chromebook_coral_defconfig | 14 ++- 2 files changed, 199 insertions(+), 8 deletions(-)
diff --git a/arch/x86/dts/chromebook_coral.dts b/arch/x86/dts/chromebook_coral.dts index 3c6f14310f..1d16975f5c 100644 --- a/arch/x86/dts/chromebook_coral.dts +++ b/arch/x86/dts/chromebook_coral.dts @@ -16,8 +16,12 @@ #endif
#include <dt-bindings/clock/intel-clock.h> +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/interrupt-controller/x86-irq.h> +#include <asm/e820.h> #include <asm/intel_pinctrl_defs.h> #include <asm/arch-apollolake/cpu.h> +#include <asm/arch-apollolake/gpe.h> #include <asm/arch-apollolake/gpio.h> #include <asm/arch-apollolake/iomap.h> #include <asm/arch-apollolake/pm.h> @@ -38,6 +42,14 @@ i2c5 = &i2c_5; i2c6 = &i2c_6; i2c7 = &i2c_7; + mmc1 = &sdmmc; + }; + + board: board { + compatible = "google,coral"; + recovery-gpios = <&gpio_nw (-1) GPIO_ACTIVE_LOW>; + write-protect-gpios = <&gpio_nw GPIO_75 GPIO_ACTIVE_HIGH>; + phase-enforce-gpios = <&gpio_n GPIO_10 GPIO_ACTIVE_HIGH>; };
config { @@ -46,6 +58,15 @@
chosen { stdout-path = &serial; + e820-entries = /bits/ 64 < + IOMAP_P2SB_BAR IOMAP_P2SB_SIZE E820_RESERVED + MCH_BASE_ADDRESS MCH_SIZE E820_RESERVED>; + u-boot,acpi-ssdt-order = <&cpu_0 + &i2c_0 &i2c_1 &i2c_2 &i2c_3 &i2c_4 &i2c_5 + &sdmmc &maxim_codec &wifi &da_codec &tpm + &elan_touchscreen &raydium_touchscreen + &elan_touchpad &synaptics_touchpad &wacom_digitizer>; + u-boot,acpi-dsdt-order = <&board &lpc>; };
clk: clock { @@ -58,7 +79,7 @@ #address-cells = <1>; #size-cells = <0>;
- cpu@0 { + cpu_0: cpu@0 { u-boot,dm-pre-reloc; device_type = "cpu"; compatible = "intel,apl-cpu"; @@ -133,21 +154,29 @@ compatible = "intel,apl-punit"; };
+ gma@2,0 { + reg = <0x00001000 0 0 0 0>; + compatible = "intel,gma"; + }; + p2sb: p2sb@d,0 { u-boot,dm-pre-reloc; reg = <0x02006810 0 0 0 0>; compatible = "intel,apl-p2sb"; early-regs = <IOMAP_P2SB_BAR 0x100000>; + pci,no-autoconfig;
n { compatible = "intel,apl-pinctrl"; u-boot,dm-pre-reloc; intel,p2sb-port-id = <PID_GPIO_N>; + acpi,path = "\_SB.GPO0"; gpio_n: gpio-n { compatible = "intel,gpio"; u-boot,dm-pre-reloc; gpio-controller; #gpio-cells = <2>; + linux-name = "INT3452:00"; }; };
@@ -156,11 +185,13 @@ compatible = "intel,apl-pinctrl"; intel,p2sb-port-id = <PID_GPIO_NW>; #gpio-cells = <2>; + acpi,path = "\_SB.GPO1"; gpio_nw: gpio-nw { compatible = "intel,gpio"; u-boot,dm-pre-reloc; gpio-controller; #gpio-cells = <2>; + linux-name = "INT3452:01"; }; };
@@ -169,11 +200,13 @@ compatible = "intel,apl-pinctrl"; intel,p2sb-port-id = <PID_GPIO_W>; #gpio-cells = <2>; + acpi,path = "\_SB.GPO2"; gpio_w: gpio-w { compatible = "intel,gpio"; u-boot,dm-pre-reloc; gpio-controller; #gpio-cells = <2>; + linux-name = "INT3452:02"; }; };
@@ -182,11 +215,13 @@ compatible = "intel,apl-pinctrl"; intel,p2sb-port-id = <PID_GPIO_SW>; #gpio-cells = <2>; + acpi,path = "\_SB.GPO3"; gpio_sw: gpio-sw { compatible = "intel,gpio"; u-boot,dm-pre-reloc; gpio-controller; #gpio-cells = <2>; + linux-name = "INT3452:03"; }; };
@@ -235,6 +270,23 @@ gpe0-en = <0x30>; };
+ audio@e,0 { + reg = <0x7000 0 0 0 0>; + compatible = "simple-bus"; + acpi,name = "HDAS"; + i2s { + compatible = "fred"; + }; + maxim_codec: maxim-codec { + compatible = "maxim,max98357a"; + acpi,desc = "Maxim Integrated 98357A Amplifier"; + sdmode-gpios = <&gpio_n GPIO_76 GPIO_ACTIVE_HIGH>; + sdmode-delay = <5>; + acpi,name = "MAXM"; + acpi,hid = "MX98357A"; + }; + }; + spi: fast-spi@d,2 { u-boot,dm-pre-reloc; reg = <0x02006a10 0 0 0 0>; @@ -264,19 +316,60 @@ }; };
+ /* WiFi */ + pcie-a0@14,0 { + reg = <0x0000a000 0 0 0 0>; + acpi,name = "RP01"; + wifi: wifi { + compatible = "intel,generic-wifi"; + acpi,desc = "Intel WiFi"; + acpi,name = "WF00"; + acpi,wake = <GPE0_DW3_00>; + interrupts-extended = <&acpi_gpe 0x3c 0>; + }; + }; + i2c_0: i2c2@16,0 { compatible = "intel,apl-i2c"; reg = <0x0200b010 0 0 0 0>; clocks = <&clk CLK_I2C>; i2c-scl-rising-time-ns = <104>; i2c-scl-falling-time-ns = <52>; + clock-frequency = <400000>; + i2c,speeds = <100000 400000 1000000>; + #address-cells = <1>; + #size-cells = <0>; + da_codec: da-codec { + reg = <0x1a>; + compatible = "dlg,da7219"; + interrupts-extended = <&acpi_gpe GPIO_116_IRQ + (IRQ_TYPE_LEVEL_LOW | X86_IRQ_TYPE_SHARED)>; + acpi,name = "DLG7"; + acpi,desc = "Dialog Semiconductor DA7219 Audio Codec"; + dlg,btn-cfg = <50>; + dlg,mic-det-thr = <500>; + dlg,jack-ins-deb = <20>; + dlg,jack-det-rate = "32ms_64ms"; + dlg,jack-rem-deb = <1>; + dlg,a-d-btn-thr = <0xa>; + dlg,d-b-btn-thr = <0x16>; + dlg,b-c-btn-thr = <0x21>; + dlg,c-mic-btn-thr = <0x3e>; + dlg,btn-avg = <4>; + dlg,adc-1bit-rpt = <1>; + dlg,micbias-lvl = <2600>; + dlg,mic-amp-in-sel = "diff"; + }; };
i2c_1: i2c2@16,1 { compatible = "intel,apl-i2c"; reg = <0x0200b110 0 0 0 0>; clocks = <&clk CLK_I2C>; - status = "disabled"; + clock-frequency = <400000>; + i2c,speeds = <100000 400000 1000000 3400000>; + i2c-scl-rising-time-ns = <52>; + i2c-scl-falling-time-ns = <52>; };
i2c_2: i2c2@16,2 { @@ -285,41 +378,119 @@ #address-cells = <1>; #size-cells = <0>; clock-frequency = <400000>; + i2c,speeds = <100000 400000 1000000>; clocks = <&clk CLK_I2C>; i2c-scl-rising-time-ns = <57>; i2c-scl-falling-time-ns = <28>; - tpm@50 { + tpm: tpm@50 { reg = <0x50>; compatible = "google,cr50"; u-boot,i2c-offset-len = <0>; ready-gpios = <&gpio_n 28 GPIO_ACTIVE_LOW>; - interrupts-extended = <&acpi_gpe 0x3c 0>; + interrupts-extended = <&acpi_gpe GPIO_28_IRQ + IRQ_TYPE_EDGE_FALLING>; + acpi,hid = "GOOG0005"; + acpi,desc = "I2C TPM"; + acpi,name = "TPMI"; }; };
i2c_3: i2c2@16,3 { compatible = "intel,apl-i2c"; reg = <0x0200b110 0 0 0 0>; + #address-cells = <1>; + #size-cells = <0>; clocks = <&clk CLK_I2C>; i2c-scl-rising-time-ns = <76>; i2c-scl-falling-time-ns = <164>; + clock-frequency = <400000>; + i2c,speeds = <100000 400000>; + elan_touchscreen: elan-touchscreen@10 { + compatible = "i2c-chip"; + reg = <0x10>; + acpi,hid = "ELAN0001"; + acpi,desc = "ELAN Touchscreen"; + interrupts-extended = <&acpi_gpe GPIO_21_IRQ + IRQ_TYPE_EDGE_FALLING>; + acpi,probed; + reset-gpios = <&gpio_n GPIO_36 GPIO_ACTIVE_HIGH>; + reset-delay-ms = <20>; + enable-gpios = <&gpio_n GPIO_152 GPIO_ACTIVE_HIGH>; + enable-delay-ms = <1>; + acpi,has-power-resource; + }; + + raydium_touchscreen: raydium-touchscreen@39 { + compatible = "i2c-chip"; + reg = <0x39>; + acpi,hid = "RAYD0001"; + acpi,desc = "Raydium Touchscreen"; + interrupts-extended = <&acpi_gpe GPIO_21_IRQ + IRQ_TYPE_EDGE_FALLING>; + acpi,probed; + reset-gpios = <&gpio_n GPIO_36 GPIO_ACTIVE_HIGH>; + reset-delay-ms = <1>; + enable-gpios = <&gpio_n GPIO_152 GPIO_ACTIVE_HIGH>; + enable-delay-ms = <50>; + acpi,has-power-resource; + }; };
i2c_4: i2c2@17,0 { compatible = "intel,apl-i2c"; reg = <0x0200b110 0 0 0 0>; + #address-cells = <1>; + #size-cells = <0>; clocks = <&clk CLK_I2C>; i2c-sda-hold-time-ns = <350>; i2c-scl-rising-time-ns = <114>; i2c-scl-falling-time-ns = <164>; + clock-frequency = <400000>; + i2c,speeds = <100000 400000>; + elan_touchpad: elan-touchpad@15 { + compatible = "i2c-chip"; + reg = <0x15>; + acpi,hid = "ELAN0000"; + acpi,desc = "ELAN Touchpad"; + interrupts-extended = <&acpi_gpe GPIO_18_IRQ + IRQ_TYPE_EDGE_FALLING>; + acpi,wake = <GPE0_DW1_15>; + acpi,probed; + }; + synaptics_touchpad: synaptics-touchpad@2c { + compatible = "i2c-chip"; + reg = <0x2c>; + acpi,hid = "PNP0C50"; + acpi,cid = "PNP0C50"; + acpi,desc = "Synaptics Touchpad"; + interrupts-extended = <&acpi_gpe GPIO_18_IRQ + IRQ_TYPE_EDGE_FALLING>; + acpi,wake = <GPE0_DW1_15>; + acpi,probed; + acpi,hid-desc-reg-offset = <0x20>; + }; };
i2c_5: i2c2@17,1 { compatible = "intel,apl-i2c"; reg = <0x0200b110 0 0 0 0>; + #address-cells = <1>; + #size-cells = <0>; clocks = <&clk CLK_I2C>; i2c-scl-rising-time-ns = <76>; i2c-scl-falling-time-ns = <164>; + clock-frequency = <400000>; + i2c,speeds = <100000 400000 1000000>; + wacom_digitizer: wacom-digitizer@9 { + compatible = "i2c-chip"; + reg = <0x9>; + acpi,hid = "WCOM50C1"; + acpi,cid = "PNP0C50"; + acpi,desc = "WCOM Digitizer"; + interrupts-extended = <&acpi_gpe GPIO_13_IRQ + (IRQ_TYPE_LEVEL_LOW | X86_IRQ_TYPE_SHARED)>; + acpi,hid-desc-reg-offset = <0x1>; + }; };
i2c_6: i2c2@17,2 { @@ -344,6 +515,15 @@ reg-shift = <2>; clock-frequency = <1843200>; current-speed = <115200>; + acpi,name = "URT3"; + pci,no-autoconfig; + }; + + sdmmc: sdmmc@1b,0 { + reg = <0x0000d800 0 0 0 0>; + compatible = "intel,apl-sd"; + cd-gpios = <&gpio_n GPIO_177 GPIO_ACTIVE_LOW>; + acpi,name = "SDCD"; };
pch: pch@1f,0 { @@ -353,7 +533,7 @@ #address-cells = <1>; #size-cells = <1>;
- lpc { + lpc: lpc { compatible = "intel,apl-lpc"; #address-cells = <1>; #size-cells = <0>; @@ -505,6 +685,9 @@ /* GPIO for SD card detect */ sdcard-cd-gpio = <GPIO_177>;
+ prt0-gpio = <GPIO_122>; + sdcard-cd-gpio = <GPIO_177>; + /* * Order is emmc-tx-data-cntl1, emmc-tx-data-cntl2, * emmc-rx-cmd-data-cntl1, emmc-rx-cmd-data-cntl2 diff --git a/configs/chromebook_coral_defconfig b/configs/chromebook_coral_defconfig index 0999fb57c6..131c37c798 100644 --- a/configs/chromebook_coral_defconfig +++ b/configs/chromebook_coral_defconfig @@ -1,6 +1,7 @@ CONFIG_X86=y CONFIG_SYS_TEXT_BASE=0x1110000 CONFIG_SYS_MALLOC_F_LEN=0x3d00 +CONFIG_MAX_CPUS=8 CONFIG_SPL_SYS_MALLOC_F_LEN=0xf000 CONFIG_NR_DRAM_BANKS=8 CONFIG_BOOTSTAGE_STASH_ADDR=0xfef00000 @@ -11,9 +12,11 @@ CONFIG_VENDOR_GOOGLE=y CONFIG_TARGET_CHROMEBOOK_CORAL=y CONFIG_DEBUG_UART=y CONFIG_FSP_VERSION2=y +CONFIG_GENERATE_PIRQ_TABLE=y +CONFIG_GENERATE_ACPI_TABLE=y CONFIG_HAVE_ACPI_RESUME=y CONFIG_INTEL_CAR_CQOS=y -CONFIG_X86_OFFSET_U_BOOT=0xffe00000 +CONFIG_X86_OFFSET_U_BOOT=0xffd00000 CONFIG_X86_OFFSET_SPL=0xffe80000 CONFIG_INTEL_GENERIC_WIFI=y CONFIG_SPL_TEXT_BASE=0xfef10000 @@ -24,14 +27,15 @@ CONFIG_BOOTSTAGE_REPORT=y CONFIG_SPL_BOOTSTAGE_RECORD_COUNT=10 CONFIG_BOOTSTAGE_STASH=y CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro earlyprintk console=tty0 console=ttyS0,115200" +CONFIG_BOOTARGS="nr_cpus=1 console=ttyS2,115200n8 cros_legacy loglevel=9 init=/sbin/init oops=panic panic=-1 root=PARTUUID=35c775e7-3735-d745-93e5-d9e0238f7ed0/PARTNROFF=1 rootwait rw noinitrd vt.global_cursor_default=0 add_efi_memmap boot=local noresume noswap i915.modeset=1 nmi_watchdog=panic,lapic disablevmx=off" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_SPL_LOG=y -CONFIG_LOG_DEFAULT_LEVEL=7 +CONFIG_LOG_DEFAULT_LEVEL=4 CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_LAST_STAGE_INIT=y CONFIG_BLOBLIST=y # CONFIG_TPL_BLOBLIST is not set +CONFIG_BLOBLIST_SIZE=0x30000 CONFIG_BLOBLIST_ADDR=0x100000 CONFIG_HANDOFF=y CONFIG_TPL_SYS_MALLOC_SIMPLE=y @@ -71,8 +75,10 @@ CONFIG_REGMAP=y CONFIG_SYSCON=y CONFIG_SPL_OF_TRANSLATE=y CONFIG_CPU=y +CONFIG_BOARD=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_DW=y +CONFIG_MISC=y CONFIG_TPL_MISC=y CONFIG_CROS_EC=y CONFIG_CROS_EC_LPC=y @@ -84,7 +90,9 @@ CONFIG_PINCTRL=y CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550=y CONFIG_SOUND=y +CONFIG_SOUND_DA7219=y CONFIG_SOUND_I8254=y +CONFIG_SOUND_MAX98357A=y CONFIG_SOUND_RT5677=y CONFIG_SPI=y CONFIG_ICH_SPI=y