So far there is only one PCI host controller in the sandbox test configuration. This is normally the case for x86, but it can be common on other architectures like ARM/PPC to have more than one PCI host controller in the system.
This updates the case to cover such scenario.
Signed-off-by: Bin Meng bmeng.cn@gmail.com Reviewed-by: Simon Glass sjg@chromium.org ---
Changes in v3: None Changes in v2: None
arch/sandbox/dts/test.dts | 28 ++++++++++++++++++++++++++-- test/dm/pci.c | 11 +++++++++++ 2 files changed, 37 insertions(+), 2 deletions(-)
diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index 237266d..0bce6d0 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -14,7 +14,8 @@ i2c0 = "/i2c@0"; mmc0 = "/mmc0"; mmc1 = "/mmc1"; - pci0 = &pci; + pci0 = &pci0; + pci1 = &pci1; remoteproc1 = &rproc_1; remoteproc2 = &rproc_2; rtc0 = &rtc_0; @@ -295,7 +296,7 @@ compatible = "sandbox,mmc"; };
- pci: pci-controller { + pci0: pci-controller0 { compatible = "sandbox,pci"; device_type = "pci"; #address-cells = <3>; @@ -318,6 +319,29 @@ }; };
+ pci1: pci-controller1 { + compatible = "sandbox,pci"; + device_type = "pci"; + #address-cells = <3>; + #size-cells = <2>; + ranges = <0x02000000 0 0x30000000 0x30000000 0 0x2000 + 0x01000000 0 0x40000000 0x40000000 0 0x2000>; + pci@8,0 { + compatible = "pci-generic"; + reg = <0x4000 0 0 0 0>; + emul@8,0 { + compatible = "sandbox,swap-case"; + }; + }; + pci@c,0 { + compatible = "pci-generic"; + reg = <0x6000 0 0 0 0>; + emul@c,0 { + compatible = "sandbox,swap-case"; + }; + }; + }; + probing { compatible = "simple-bus"; test1 { diff --git a/test/dm/pci.c b/test/dm/pci.c index f2bd52a..727ec34 100644 --- a/test/dm/pci.c +++ b/test/dm/pci.c @@ -26,6 +26,7 @@ static int dm_test_pci_busdev(struct unit_test_state *uts) struct udevice *bus; struct udevice *emul, *swap;
+ /* Test bus#0 and its devices */ ut_assertok(uclass_get_device_by_seq(UCLASS_PCI, 0, &bus));
ut_assertok(uclass_get_device(UCLASS_PCI_EMUL, 0, &emul)); @@ -35,6 +36,16 @@ static int dm_test_pci_busdev(struct unit_test_state *uts) ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(0, 0x1f, 0), &swap)); ut_assert(device_active(swap));
+ /* Test bus#1 and its devices */ + ut_assertok(uclass_get_device_by_seq(UCLASS_PCI, 1, &bus)); + + ut_assertok(uclass_get_device(UCLASS_PCI_EMUL, 2, &emul)); + ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(1, 0x08, 0), &swap)); + ut_assert(device_active(swap)); + ut_assertok(uclass_get_device(UCLASS_PCI_EMUL, 3, &emul)); + ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(1, 0x0c, 0), &swap)); + ut_assert(device_active(swap)); + return 0; } DM_TEST(dm_test_pci_busdev, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);