This formula is better at avoiding integer overflow.
Signed-off-by: Gerald Van Baren vanbaren@cideas.com ---
This is my latest entry in the baud rate rounding dual. Since it doesn't multiply the master BRG clock but instead adds the baud rate scaled by 1/2 the clock multiplier, it should not overflow (for a master clock right at the edge of overflowing itself, it still will overflow, but that is pretty unlikely).
This compiles OK on the mpc7448hpc2. I have only tested it on a calculator. I have NOT tested it on real hardware.
drivers/serial/serial.c | 16 +++++----------- 1 files changed, 5 insertions(+), 11 deletions(-)
diff --git a/drivers/serial/serial.c b/drivers/serial/serial.c index 4ccaee2..7f43540 100644 --- a/drivers/serial/serial.c +++ b/drivers/serial/serial.c @@ -124,7 +124,6 @@ static NS16550_t serial_ports[4] = {
static int calc_divisor (NS16550_t port) { - uint32_t clk_divisor;
#ifdef CONFIG_OMAP1510 /* If can't cleanly clock 115200 set div to 1 */ @@ -147,17 +146,12 @@ static int calc_divisor (NS16550_t port) #define MODE_X_DIV 16 #endif
- /* Compute divisor value. Normally, we should simply return: - * CFG_NS16550_CLK) / MODE_X_DIV / gd->baudrate - * but we need to round that value by adding 0.5 (2/4). - * Rounding is especially important at high baud rates. + /* + * Compute divisor value, rounding it properly. Rounding is + * especially important at high baud rates. */ - clk_divisor = (((4 * CFG_NS16550_CLK) / - (MODE_X_DIV * gd->baudrate)) + 2) / 4; - - debug("NS16550 clock divisor = %d\n", clk_divisor); - - return clk_divisor; + return (CFG_NS16550_CLK + (gd->baudrate * (MODE_X_DIV / 2))) / + (MODE_X_DIV * gd->baudrate); }
#if !defined(CONFIG_SERIAL_MULTI)