Re: [PATCH] rockchip: rk3328: add rock-pi-e-rk3328_defconfig

14 Apr 2020

Hi banglang,
Does this board dts also upstream to kernel? If yes, please split the 
dts as a separate patch
and add the commit info in the message.
On 2020/4/13 下午4:23, banglang.huang wrote:
...
The ROCK-PI-E is a credit card size SBC based on Rockchip RK3328
Quad-Core ARM Cortex A53.
 Net - Dual ethernet port, 1 X Gbe, 1 X 100M
 USB - USB 3.0
 DC  - USB-Type C, 5V 2A
 Storage - TF card, eMMC


Just build u-boot-dtb.bin for Rockpi E board and follow the blow
steps to replace the relevant partition.
./rkbin/tools/loaderimage --pack --uboot u-boot-dtb.bin \
       uboot.img 0x200000 --size 1024 1
   dd if=uboot.img of=/dev/sdcard seek=16384 conv=notrunc
RK3328 has enable the TPL support for dram init, could you enable 
TPL/SPL for this board?
Thanks,
- Kever
...
Signed-off-by: banglang.huang banglang.huang@foxmail.com
Changes for v3
 - rename to rock-pi-e


Changes for v2
 - add introduction for rockpie in doc/README.rockchip
 - enable CONFIG_MISC_INIT_R, CONFIG_SMBIOS_MANUFACTURER,
   and CONFIG_SMBIOS_PRODUCT_NAME


arch/arm/dts/Makefile                     |   3 +-
  arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi |  12 +
  arch/arm/dts/rk3328-rock-pi-e.dts         | 256 ++++++++++++++++++++++
  board/rockchip/evb_rk3328/MAINTAINERS     |   7 +
  configs/rock-pi-e-rk3328_defconfig        |  99 +++++++++
  doc/README.rockchip                       |   3 +-
  6 files changed, 378 insertions(+), 2 deletions(-)
  create mode 100644 arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi
  create mode 100644 arch/arm/dts/rk3328-rock-pi-e.dts
  create mode 100644 configs/rock-pi-e-rk3328_defconfig

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 820ee9733a..f0897f2928 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -104,7 +104,8 @@ dtb-$(CONFIG_ROCKCHIP_RK3308) += \
dtb-$(CONFIG_ROCKCHIP_RK3328) += \
   rk3328-evb.dtb \

rk3328-rock64.dtb


rk3328-rock64.dtb \

rk3328-rock-pi-e.dtb
dtb-$(CONFIG_ROCKCHIP_RK3368) += \
rk3368-lion.dtb \


diff --git a/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi b/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi
new file mode 100644
index 0000000000..012209110a
--- /dev/null
+++ b/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi
@@ -0,0 +1,12 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*


(C) Copyright 2020 Radxa


*/


+#include "rk3328-u-boot.dtsi"
+#include "rk3328-sdram-ddr3-666.dtsi"



+&usb_host0_xhci {

vbus-supply = <&vcc5v0_host_xhci>;
status = "okay";

+};
diff --git a/arch/arm/dts/rk3328-rock-pi-e.dts b/arch/arm/dts/rk3328-rock-pi-e.dts
new file mode 100644
index 0000000000..56b8c3f1e6
--- /dev/null
+++ b/arch/arm/dts/rk3328-rock-pi-e.dts
@@ -0,0 +1,256 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*


(C) Copyright 2020 Radxa


*/


+/dts-v1/;
+#include "rk3328.dtsi"



+/ {

model = "Radxa Rockpi E";
compatible = "radxa,rockpie", "rockchip,rk3328";

chosen {
stdout-path = &uart2;


};

gmac_clkin: external-gmac-clock {
compatible = "fixed-clock";


clock-frequency = <125000000>;


clock-output-names = "gmac_clkin";


#clock-cells = <0>;


};

vcc3v3_sdmmc: sdmmc-pwren {
compatible = "regulator-fixed";


regulator-name = "vcc3v3";


gpio = <&gpio0 30 GPIO_ACTIVE_LOW>;


pinctrl-names = "default";


pinctrl-0 = <&sdmmc0m1_gpio>;


regulator-always-on;


regulator-boot-on;


regulator-min-microvolt = <3300000>;


regulator-max-microvolt = <3300000>;


vin-supply = <&vcc_io>;


};

vcc5v0_host_xhci: vcc5v0-host-xhci-drv {
compatible = "regulator-fixed";


enable-active-high;


regulator-name = "vcc5v0_host_xhci";


gpio = <&gpio3 7 GPIO_ACTIVE_HIGH>;


regulator-min-microvolt = <5000000>;


regulator-max-microvolt = <5000000>;


};

+};



+&cpu0 {

cpu-supply = <&vdd_arm>;

+};



+&cpu1 {

cpu-supply = <&vdd_arm>;

+};



+&cpu2 {

cpu-supply = <&vdd_arm>;

+};



+&cpu3 {

cpu-supply = <&vdd_arm>;

+};



+&saradc {

status = "okay";

+};



+&uart2 {

status = "okay";

+};



+&sdmmc {

bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
card-detect-delay = <200>;
disable-wp;
max-frequency = <150000000>;
num-slots = <1>;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_dectn>, <&sdmmc0_bus4>;
supports-sd;
vmmc-supply = <&vcc3v3_sdmmc>;
status = "okay";

+};



+&emmc {

bus-width = <8>;
cap-mmc-highspeed;
mmc-hs200-1_8v;
supports-emmc;
disable-wp;
non-removable;
num-slots = <1>;
pinctrl-names = "default";
pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
vmmc-supply = <&vcc_io>;
vqmmc-supply = <&vcc_18emmc>;
status = "okay";

+};



+&gmac2io {

phy-supply = <&vcc_io>;
phy-mode = "rgmii";
clock_in_out = "input";
snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
snps,reset-delays-us = <0 10000 50000>;
assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>;
pinctrl-names = "default";
pinctrl-0 = <&rgmiim1_pins>;
tx_delay = <0x26>;
rx_delay = <0x11>;
status = "okay";

+};



+&usb_host0_ehci {

status = "okay";

+};



+&usb_host0_ohci {

status = "okay";

+};



+&usb20_otg {

status = "okay";

+};



+&i2c1 {

clock-frequency = <400000>;
i2c-scl-rising-time-ns = <168>;
i2c-scl-falling-time-ns = <4>;
status = "okay";

rk805: pmic@18 {
compatible = "rockchip,rk805";


status = "okay";


reg = <0x18>;


interrupt-parent = <&gpio2>;


interrupts = <6 IRQ_TYPE_LEVEL_LOW>;


pinctrl-names = "default";


pinctrl-0 = <&pmic_int_l>;


rockchip,system-power-controller;


wakeup-source;


gpio-controller;


#gpio-cells = <2>;


#clock-cells = <1>;


clock-output-names = "xin32k", "rk805-clkout2";



regulators {


	vdd_logic: DCDC_REG1 {


		regulator-name = "vdd_logic";


		regulator-min-microvolt = <712500>;


		regulator-max-microvolt = <1450000>;


		regulator-ramp-delay = <6001>;


		regulator-boot-on;


		regulator-always-on;


		regulator-state-mem {


			regulator-on-in-suspend;


			regulator-suspend-microvolt = <1000000>;


		};


	};



	vdd_arm: DCDC_REG2 {


		regulator-name = "vdd_arm";


		regulator-min-microvolt = <712500>;


		regulator-max-microvolt = <1450000>;


		regulator-ramp-delay = <6001>;


		regulator-boot-on;


		regulator-always-on;


		regulator-state-mem {


			regulator-on-in-suspend;


			regulator-suspend-microvolt = <1000000>;


		};


	};



	vcc_ddr: DCDC_REG3 {


		regulator-name = "vcc_ddr";


		regulator-boot-on;


		regulator-always-on;


		regulator-state-mem {


			regulator-on-in-suspend;


		};


	};



	vcc_io: DCDC_REG4 {


		regulator-name = "vcc_io";


		regulator-min-microvolt = <3300000>;


		regulator-max-microvolt = <3300000>;


		regulator-boot-on;


		regulator-always-on;


		regulator-state-mem {


			regulator-on-in-suspend;


			regulator-suspend-microvolt = <3300000>;


		};


	};



	vdd_18: LDO_REG1 {


		regulator-name = "vdd_18";


		regulator-min-microvolt = <1800000>;


		regulator-max-microvolt = <1800000>;


		regulator-boot-on;


		regulator-always-on;


		regulator-state-mem {


			regulator-on-in-suspend;


			regulator-suspend-microvolt = <1800000>;


		};


	};



	vcc_18emmc: LDO_REG2 {


		regulator-name = "vcc_18emmc";


		regulator-min-microvolt = <1800000>;


		regulator-max-microvolt = <1800000>;


		regulator-boot-on;


		regulator-always-on;


		regulator-state-mem {


			regulator-on-in-suspend;


			regulator-suspend-microvolt = <1800000>;


		};


	};



	vdd_10: LDO_REG3 {


		regulator-name = "vdd_10";


		regulator-min-microvolt = <1000000>;


		regulator-max-microvolt = <1000000>;


		regulator-boot-on;


		regulator-always-on;


		regulator-state-mem {


			regulator-on-in-suspend;


			regulator-suspend-microvolt = <1000000>;


		};


	};


};


};

+};



+&io_domains {

status = "okay";
vccio1-supply = <&vcc_io>;
vccio2-supply = <&vcc_18emmc>;
vccio3-supply = <&vcc_io>;
vccio4-supply = <&vcc_io>;
vccio5-supply = <&vcc_io>;
vccio6-supply = <&vcc_io>;
pmuio-supply = <&vcc_io>;

+};



+&pinctrl {

pmic {
pmic_int_l: pmic-int-l {


rockchip,pins =


	<2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>;	/* gpio2_a6 */


};


};

+};



diff --git a/board/rockchip/evb_rk3328/MAINTAINERS b/board/rockchip/evb_rk3328/MAINTAINERS
index c661d2e06a..77191f8e2e 100644
--- a/board/rockchip/evb_rk3328/MAINTAINERS
+++ b/board/rockchip/evb_rk3328/MAINTAINERS
@@ -10,3 +10,10 @@ M:      Matwey V. Kornilov matwey.kornilov@gmail.com
  S:      Maintained
  F:      configs/rock64-rk3328_defconfig
  F:      arch/arm/dts/rk3328-rock64-u-boot.dtsi



+ROCK-PI-E-RK3328
+M:      Banglang Huang banglang.huang@foxmail.com
+S:      Maintained
+F:      configs/rock-pi-e-rk3328_defconfig
+F:      arch/arm/dts/rk3328-rock-pi-e.dts
+F:      arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi
diff --git a/configs/rock-pi-e-rk3328_defconfig b/configs/rock-pi-e-rk3328_defconfig
new file mode 100644
index 0000000000..8c1ad28e92
--- /dev/null
+++ b/configs/rock-pi-e-rk3328_defconfig
@@ -0,0 +1,99 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_ENV_OFFSET=0x3F8000
+CONFIG_ROCKCHIP_RK3328=y
+CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
+CONFIG_TPL_LIBCOMMON_SUPPORT=y
+CONFIG_TPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_STACK_R_ADDR=0x4000000
+CONFIG_SPL_SYS_MALLOC_F_LEN=0x4000
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_DEBUG_UART_BASE=0xFF130000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_SMBIOS_PRODUCT_NAME="rock-pi-e_rk3328"
+CONFIG_DEBUG_UART=y
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
+# CONFIG_ANDROID_BOOT_IMAGE is not set
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-rock-pi-e.dtb"
+CONFIG_MISC_INIT_R=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+CONFIG_TPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
+CONFIG_SPL_ATF=y
+CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
+CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TIME=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_TPL_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="rk3328-rock-pi-e"
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_TPL_OF_PLATDATA=y
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_TPL_DM=y
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_TPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+CONFIG_TPL_SYSCON=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_FASTBOOT_BUF_ADDR=0x800800
+CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_SF_DEFAULT_SPEED=20000000
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PHY=y
+CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_TPL_RAM=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_SYSRESET=y
+# CONFIG_TPL_SYSRESET is not set
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_DWC2=y
+CONFIG_USB_DWC3=y
+# CONFIG_USB_DWC3_GADGET is not set
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_TPL_TINY_MEMSET=y
+CONFIG_ERRNO_STR=y
+CONFIG_SMBIOS_MANUFACTURER="radxa"
diff --git a/doc/README.rockchip b/doc/README.rockchip
index 9b699b9ae5..d963698a3f 100644
--- a/doc/README.rockchip
+++ b/doc/README.rockchip
@@ -52,10 +52,11 @@ Two RK3308 boards are supported:
     - EVB RK3308 - use evb-rk3308 configuration
     - ROC-CC-RK3308 - use roc-cc-rk3308 configuration
-Two RK3328 board are supported:
+Three RK3328 board are supported:
 - EVB RK3328 - use evb-rk3328_defconfig
 - Pine64 Rock64 board - use rock64-rk3328_defconfig



Radxa Rockpi E board - use rock-pi-e-rk3328_defconfig

Size RK3399 boards are supported (aarch64):



    

Re: [PATCH] rockchip: rk3328: add rock-pi-e-rk3328_defconfig

Kever Yang

Signed-off-by: banglang.huang banglang.huang@foxmail.com