This board has not been converted to use DM_SERIAL by the deadline. Drop it.
Signed-off-by: Simon Glass sjg@chromium.org ---
arch/arm/Kconfig | 5 - board/toradex/colibri_pxa270/Kconfig | 12 -- board/toradex/colibri_pxa270/MAINTAINERS | 6 - board/toradex/colibri_pxa270/Makefile | 9 -- board/toradex/colibri_pxa270/colibri_pxa270.c | 107 ------------ configs/colibri_pxa270_defconfig | 19 --- include/configs/colibri_pxa270.h | 223 -------------------------- 7 files changed, 381 deletions(-) delete mode 100644 board/toradex/colibri_pxa270/Kconfig delete mode 100644 board/toradex/colibri_pxa270/MAINTAINERS delete mode 100644 board/toradex/colibri_pxa270/Makefile delete mode 100644 board/toradex/colibri_pxa270/colibri_pxa270.c delete mode 100644 configs/colibri_pxa270_defconfig delete mode 100644 include/configs/colibri_pxa270.h
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index d7a9b11..59c7bcc 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -813,10 +813,6 @@ config TARGET_ZIPITZ2 bool "Support zipitz2" select CPU_PXA
-config TARGET_COLIBRI_PXA270 - bool "Support colibri_pxa270" - select CPU_PXA - config ARCH_UNIPHIER bool "Socionext UniPhier SoCs" select BLK @@ -1013,7 +1009,6 @@ source "board/birdland/bav335x/Kconfig" source "board/ti/ti814x/Kconfig" source "board/ti/ti816x/Kconfig" source "board/timll/devkit3250/Kconfig" -source "board/toradex/colibri_pxa270/Kconfig" source "board/toradex/colibri_vf/Kconfig" source "board/technologic/ts4800/Kconfig" source "board/vscom/baltos/Kconfig" diff --git a/board/toradex/colibri_pxa270/Kconfig b/board/toradex/colibri_pxa270/Kconfig deleted file mode 100644 index 949407a..0000000 --- a/board/toradex/colibri_pxa270/Kconfig +++ /dev/null @@ -1,12 +0,0 @@ -if TARGET_COLIBRI_PXA270 - -config SYS_BOARD - default "colibri_pxa270" - -config SYS_VENDOR - default "toradex" - -config SYS_CONFIG_NAME - default "colibri_pxa270" - -endif diff --git a/board/toradex/colibri_pxa270/MAINTAINERS b/board/toradex/colibri_pxa270/MAINTAINERS deleted file mode 100644 index b378d7b..0000000 --- a/board/toradex/colibri_pxa270/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -COLIBRI_PXA270 BOARD -M: Marek Vasut marek.vasut@gmail.com -S: Maintained -F: board/toradex/colibri_pxa270/ -F: include/configs/colibri_pxa270.h -F: configs/colibri_pxa270_defconfig diff --git a/board/toradex/colibri_pxa270/Makefile b/board/toradex/colibri_pxa270/Makefile deleted file mode 100644 index 57cfe9b..0000000 --- a/board/toradex/colibri_pxa270/Makefile +++ /dev/null @@ -1,9 +0,0 @@ -# -# Toradex Colibri PXA270 Support -# -# Copyright (C) 2010 Marek Vasut marek.vasut@gmail.com -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := colibri_pxa270.o diff --git a/board/toradex/colibri_pxa270/colibri_pxa270.c b/board/toradex/colibri_pxa270/colibri_pxa270.c deleted file mode 100644 index 3def0a6..0000000 --- a/board/toradex/colibri_pxa270/colibri_pxa270.c +++ /dev/null @@ -1,107 +0,0 @@ -/* - * Toradex Colibri PXA270 Support - * - * Copyright (C) 2010 Marek Vasut marek.vasut@gmail.com - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <asm/arch/hardware.h> -#include <asm/arch/regs-mmc.h> -#include <asm/arch/pxa.h> -#include <netdev.h> -#include <asm/io.h> -#include <serial.h> -#include <usb.h> - -DECLARE_GLOBAL_DATA_PTR; - -int board_init(void) -{ - /* We have RAM, disable cache */ - dcache_disable(); - icache_disable(); - - /* arch number of Toradex Colibri PXA270 */ - gd->bd->bi_arch_number = MACH_TYPE_COLIBRI; - - /* adress of boot parameters */ - gd->bd->bi_boot_params = 0xa0000100; - - return 0; -} - -int dram_init(void) -{ - pxa2xx_dram_init(); - gd->ram_size = PHYS_SDRAM_1_SIZE; - return 0; -} - -#ifdef CONFIG_CMD_USB -int board_usb_init(int index, enum usb_init_type init) -{ - writel((readl(UHCHR) | UHCHR_PCPL | UHCHR_PSPL) & - ~(UHCHR_SSEP0 | UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE), - UHCHR); - - writel(readl(UHCHR) | UHCHR_FSBIR, UHCHR); - - while (UHCHR & UHCHR_FSBIR) - ; - - writel(readl(UHCHR) & ~UHCHR_SSE, UHCHR); - writel((UHCHIE_UPRIE | UHCHIE_RWIE), UHCHIE); - - /* Clear any OTG Pin Hold */ - if (readl(PSSR) & PSSR_OTGPH) - writel(readl(PSSR) | PSSR_OTGPH, PSSR); - - writel(readl(UHCRHDA) & ~(0x200), UHCRHDA); - writel(readl(UHCRHDA) | 0x100, UHCRHDA); - - /* Set port power control mask bits, only 3 ports. */ - writel(readl(UHCRHDB) | (0x7<<17), UHCRHDB); - - /* enable port 2 */ - writel(readl(UP2OCR) | UP2OCR_HXOE | UP2OCR_HXS | - UP2OCR_DMPDE | UP2OCR_DPPDE, UP2OCR); - - return 0; -} - -int board_usb_cleanup(int index, enum usb_init_type init) -{ - return 0; -} - -void usb_board_stop(void) -{ - writel(readl(UHCHR) | UHCHR_FHR, UHCHR); - udelay(11); - writel(readl(UHCHR) & ~UHCHR_FHR, UHCHR); - - writel(readl(UHCCOMS) | 1, UHCCOMS); - udelay(10); - - writel(readl(CKEN) & ~CKEN10_USBHOST, CKEN); - - return; -} -#endif - -#ifdef CONFIG_DRIVER_DM9000 -int board_eth_init(bd_t *bis) -{ - return dm9000_initialize(bis); -} -#endif - -#ifdef CONFIG_CMD_MMC -int board_mmc_init(bd_t *bis) -{ - pxa_mmc_register(0); - return 0; -} -#endif diff --git a/configs/colibri_pxa270_defconfig b/configs/colibri_pxa270_defconfig deleted file mode 100644 index 9a57041..0000000 --- a/configs/colibri_pxa270_defconfig +++ /dev/null @@ -1,19 +0,0 @@ -CONFIG_ARM=y -CONFIG_TARGET_COLIBRI_PXA270=y -# CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_HUSH_PARSER=y -CONFIG_SYS_PROMPT="$ " -# CONFIG_CMD_IMLS is not set -# CONFIG_CMD_LOADB is not set -# CONFIG_CMD_LOADS is not set -CONFIG_CMD_MMC=y -CONFIG_CMD_USB=y -# CONFIG_CMD_SETEXPR is not set -CONFIG_CMD_DHCP=y -CONFIG_CMD_PING=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_FAT=y -CONFIG_USB=y -CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y -# CONFIG_EFI_LOADER is not set diff --git a/include/configs/colibri_pxa270.h b/include/configs/colibri_pxa270.h deleted file mode 100644 index ba8d93c..0000000 --- a/include/configs/colibri_pxa270.h +++ /dev/null @@ -1,223 +0,0 @@ -/* - * Toradex Colibri PXA270 configuration file - * - * Copyright (C) 2010 Marek Vasut marek.vasut@gmail.com - * Copyright (C) 2015 Marcel Ziswiler marcel@ziswiler.com - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* - * High Level Board Configuration Options - */ -#define CONFIG_CPU_PXA27X 1 /* Marvell PXA270 CPU */ -#define CONFIG_SYS_TEXT_BASE 0x0 -/* Avoid overwriting factory configuration block */ -#define CONFIG_BOARD_SIZE_LIMIT 0x40000 - -/* We will never enable dcache because we have to setup MMU first */ -#define CONFIG_SYS_DCACHE_OFF - -/* - * Environment settings - */ -#define CONFIG_ENV_OVERWRITE -#define CONFIG_SYS_MALLOC_LEN (128 * 1024) -#define CONFIG_ARCH_CPU_INIT -#define CONFIG_BOOTCOMMAND \ - "if fatload mmc 0 0xa0000000 uImage; then " \ - "bootm 0xa0000000; " \ - "fi; " \ - "if usb reset && fatload usb 0 0xa0000000 uImage; then " \ - "bootm 0xa0000000; " \ - "fi; " \ - "bootm 0xc0000;" -#define CONFIG_BOOTARGS "console=tty0 console=ttyS0,115200" -#define CONFIG_TIMESTAMP -#define CONFIG_CMDLINE_TAG -#define CONFIG_SETUP_MEMORY_TAGS -#define CONFIG_LZMA /* LZMA compression support */ - -/* - * Serial Console Configuration - */ -#define CONFIG_PXA_SERIAL -#define CONFIG_FFUART 1 -#define CONFIG_CONS_INDEX 3 -#define CONFIG_BAUDRATE 115200 - -/* - * Bootloader Components Configuration - */ -#define CONFIG_CMD_ENV - -/* I2C support */ -#ifdef CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_PXA -#define CONFIG_PXA_STD_I2C -#define CONFIG_PXA_PWR_I2C -#define CONFIG_SYS_I2C_SPEED 100000 -#endif - -/* LCD support */ -#ifdef CONFIG_LCD -#define CONFIG_PXA_LCD -#define CONFIG_PXA_VGA -#define CONFIG_SYS_WHITE_ON_BLACK -#define CONFIG_CONSOLE_SCROLL_LINES 10 -#define CONFIG_CMD_BMP -#define CONFIG_LCD_LOGO -#endif - -/* - * Networking Configuration - */ -#ifdef CONFIG_CMD_NET - -#define CONFIG_DRIVER_DM9000 1 -#define CONFIG_DM9000_BASE 0x08000000 -#define DM9000_IO (CONFIG_DM9000_BASE) -#define DM9000_DATA (CONFIG_DM9000_BASE + 4) -#define CONFIG_NET_RETRY_COUNT 10 - -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME -#endif - -#undef CONFIG_SYS_LONGHELP /* Saves 10 KB */ -#define CONFIG_SYS_CBSIZE 256 -#define CONFIG_SYS_PBSIZE \ - (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) -#define CONFIG_SYS_MAXARGS 16 -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#define CONFIG_SYS_DEVICE_NULLDEV 1 -#define CONFIG_CMDLINE_EDITING 1 -#define CONFIG_AUTO_COMPLETE 1 - -/* - * Clock Configuration - */ -#define CONFIG_SYS_CPUSPEED 0x290 /* 520MHz */ - -/* - * DRAM Map - */ -#define CONFIG_NR_DRAM_BANKS 1 /* We have 1 bank of DRAM */ -#define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */ -#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */ - -#define CONFIG_SYS_DRAM_BASE 0xa0000000 /* CS0 */ -#define CONFIG_SYS_DRAM_SIZE 0x04000000 /* 64 MB DRAM */ - -#define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */ - -#define CONFIG_SYS_LOAD_ADDR PHYS_SDRAM_1 -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define CONFIG_SYS_INIT_SP_ADDR 0x5c010000 - -/* - * NOR FLASH - */ -#ifdef CONFIG_CMD_FLASH -#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */ -#define PHYS_FLASH_SIZE 0x02000000 /* 32 MB */ -#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 - -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER 1 -#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_32BIT - -#define CONFIG_SYS_MAX_FLASH_SECT (4 + 255) -#define CONFIG_SYS_MAX_FLASH_BANKS 1 - -#define CONFIG_SYS_FLASH_ERASE_TOUT (25 * CONFIG_SYS_HZ) -#define CONFIG_SYS_FLASH_WRITE_TOUT (25 * CONFIG_SYS_HZ) -#define CONFIG_SYS_FLASH_LOCK_TOUT (25 * CONFIG_SYS_HZ) -#define CONFIG_SYS_FLASH_UNLOCK_TOUT (25 * CONFIG_SYS_HZ) - -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 -#define CONFIG_SYS_FLASH_PROTECTION 1 - -#define CONFIG_ENV_IS_IN_FLASH 1 - -#else /* No flash */ -#define CONFIG_SYS_NO_FLASH -#define CONFIG_ENV_IS_NOWHERE -#endif - -#define CONFIG_SYS_MONITOR_BASE 0x0 -#define CONFIG_SYS_MONITOR_LEN 0x40000 - -/* Skip factory configuration block */ -#define CONFIG_ENV_ADDR \ - (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN + 0x40000) -#define CONFIG_ENV_SIZE 0x40000 -#define CONFIG_ENV_SECT_SIZE 0x40000 - -/* - * GPIO settings - */ -#define CONFIG_SYS_GPSR0_VAL 0x00000000 -#define CONFIG_SYS_GPSR1_VAL 0x00020000 -#define CONFIG_SYS_GPSR2_VAL 0x0002c000 -#define CONFIG_SYS_GPSR3_VAL 0x00000000 - -#define CONFIG_SYS_GPCR0_VAL 0x00000000 -#define CONFIG_SYS_GPCR1_VAL 0x00000000 -#define CONFIG_SYS_GPCR2_VAL 0x00000000 -#define CONFIG_SYS_GPCR3_VAL 0x00000000 - -#define CONFIG_SYS_GPDR0_VAL 0xc8008000 -#define CONFIG_SYS_GPDR1_VAL 0xfc02a981 -#define CONFIG_SYS_GPDR2_VAL 0x92c3ffff -#define CONFIG_SYS_GPDR3_VAL 0x0061e804 - -#define CONFIG_SYS_GAFR0_L_VAL 0x80100000 -#define CONFIG_SYS_GAFR0_U_VAL 0xa5c00010 -#define CONFIG_SYS_GAFR1_L_VAL 0x6992901a -#define CONFIG_SYS_GAFR1_U_VAL 0xaaa50008 -#define CONFIG_SYS_GAFR2_L_VAL 0xaaaaaaaa -#define CONFIG_SYS_GAFR2_U_VAL 0x4109a002 -#define CONFIG_SYS_GAFR3_L_VAL 0x54000310 -#define CONFIG_SYS_GAFR3_U_VAL 0x00005401 - -#define CONFIG_SYS_PSSR_VAL 0x30 - -/* - * Clock settings - */ -#define CONFIG_SYS_CKEN 0x00500240 -#define CONFIG_SYS_CCCR 0x02000290 - -/* - * Memory settings - */ -#define CONFIG_SYS_MSC0_VAL 0x9ee1c5f2 -#define CONFIG_SYS_MSC1_VAL 0x9ee1f994 -#define CONFIG_SYS_MSC2_VAL 0x9ee19ee1 -#define CONFIG_SYS_MDCNFG_VAL 0x090009c9 -#define CONFIG_SYS_MDREFR_VAL 0x2003a031 -#define CONFIG_SYS_MDMRS_VAL 0x00220022 -#define CONFIG_SYS_FLYCNFG_VAL 0x00010001 -#define CONFIG_SYS_SXCNFG_VAL 0x40044004 - -/* - * PCMCIA and CF Interfaces - */ -#define CONFIG_SYS_MECR_VAL 0x00000000 -#define CONFIG_SYS_MCMEM0_VAL 0x00028307 -#define CONFIG_SYS_MCMEM1_VAL 0x00014307 -#define CONFIG_SYS_MCATT0_VAL 0x00038787 -#define CONFIG_SYS_MCATT1_VAL 0x0001c787 -#define CONFIG_SYS_MCIO0_VAL 0x0002830f -#define CONFIG_SYS_MCIO1_VAL 0x0001430f - -#include "pxa-common.h" - -#endif /* __CONFIG_H */