Dear Chander Kashyap,
On 21 March 2011 17:40, Chander Kashyap chander.kashyap@linaro.org wrote:
MMC controller "control4" register offset set to 0x8C as per data sheet. Added missed out reserved field. Updated padding field size.
Signed-off-by: Chander Kashyap chander.kashyap@linaro.org Signed-off-by: Tushar Behera tushar.behera@linaro.org
arch/arm/include/asm/arch-s5pc2xx/mmc.h | 5 +++-- 1 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm/include/asm/arch-s5pc2xx/mmc.h b/arch/arm/include/asm/arch-s5pc2xx/mmc.h index 528150d..04827ca 100644 --- a/arch/arm/include/asm/arch-s5pc2xx/mmc.h +++ b/arch/arm/include/asm/arch-s5pc2xx/mmc.h @@ -53,10 +53,11 @@ struct s5p_mmc { unsigned char res3[0x34]; unsigned int control2; unsigned int control3;
- unsigned char res4[4];
unsigned int control4;
- unsigned char res4[0x6e];
- unsigned char res5[0x6e];
unsigned short hcver;
- unsigned char res5[0xFF02];
- unsigned char res6[0xFF00];
};
struct mmc_host {
Thanks for patch. But, you should fix s5pc1xx also. Please send next patch.
Thanks. Minkyu Kang.