-----Original Message----- From: Lim, Elly Siew Chin elly.siew.chin.lim@intel.com Sent: Thursday, December 24, 2020 6:21 PM To: u-boot@lists.denx.de Cc: Marek Vasut marex@denx.de; Tan, Ley Foon ley.foon.tan@intel.com; See, Chin Liang chin.liang.see@intel.com; Simon Goldschmidt simon.k.r.goldschmidt@gmail.com; Chee, Tien Fong tien.fong.chee@intel.com; Westergreen, Dalon dalon.westergreen@intel.com; Simon Glass sjg@chromium.org; Gan, Yau Wai yau.wai.gan@intel.com; Lim, Elly Siew Chin elly.siew.chin.lim@intel.com Subject: [v7 07/18] arm: socfpga: Add secure register access helper functions for SoC 64bits
These secure register access functions allow U-Boot proper running at EL2 (non-secure) to access System Manager's secure registers by calling the ATF's PSCI runtime services (EL3/secure).
Signed-off-by: Siew Chin Lim elly.siew.chin.lim@intel.com
v5
Return error code instead of hang the system if fail to access the secure register.
v6
Directly return 'ret' after SMC call in write and update function.
v7
Simplify the code to "return invoke_smc(..." in write and update function.
arch/arm/mach-socfpga/Makefile | 1 + .../mach-socfpga/include/mach/secure_reg_helper.h | 19 +++++ arch/arm/mach-socfpga/secure_reg_helper.c | 89
Reviewed-by: Ley Foon Tan ley.foon.tan@intel.com
Regards Ley Foon