Hi,
I found that IXP425 (big endian ARM) did not work with e1000 network driver. The reason is broken access to controller registers.
I get it working with this patch:
-------- --- a/drivers/net/e1000.c +++ b/drivers/net/e1000.c @@ -105,12 +105,15 @@ static void e1000_phy_hw_reset(struct e1000_hw *hw); static int e1000_phy_reset(struct e1000_hw *hw); static int e1000_detect_gig_phy(struct e1000_hw *hw);
-#define E1000_WRITE_REG(a, reg, value) (writel((value), ((a)->hw_addr + E1000_##reg))) -#define E1000_READ_REG(a, reg) (readl((a)->hw_addr + E1000_##reg)) -#define E1000_WRITE_REG_ARRAY(a, reg, offset, value) (\ - writel((value), ((a)->hw_addr + E1000_##reg + ((offset) << 2)))) -#define E1000_READ_REG_ARRAY(a, reg, offset) ( \ - readl((a)->hw_addr + E1000_##reg + ((offset) << 2))) +#define E1000_WRITE_REG(a, reg, value) \ + (writel(cpu_to_le32(value), ((a)->hw_addr + E1000_##reg))) +#define E1000_READ_REG(a, reg) \ + (le32_to_cpu(readl((a)->hw_addr + E1000_##reg))) +#define E1000_WRITE_REG_ARRAY(a, reg, offset, value) \ + (writel(cpu_to_le32(value),\ + ((a)->hw_addr + E1000_##reg + ((offset) << 2)))) +#define E1000_READ_REG_ARRAY(a, reg, offset) \ + (le32_to_cpu(readl((a)->hw_addr + E1000_##reg + ((offset) << 2)))) #define E1000_WRITE_FLUSH(a) {uint32_t x; x = E1000_READ_REG(a, STATUS);}
#ifndef CONFIG_AP1000 /* remove for warnings */ ---------
However, I'm not sure it this is the correct fix.
Is readl supposed to read raw data?
Is le32_to_cpu/cpu_to_le32 a function or a macro? In the later case the code is not save or slow due to multiple argument expansion.
-- Stefan