I would like to add some explanations:
This is the issue gone from GCC behavior on VLA allocation. I did a simple test with VLA, and the following snippet from its ASM listing may clarify the root cause of issue:
VLA allocation start. R1 is initialized by the length of VLA.
80080030: e281300f add r3, r1, #15 ; 0xf 80080034: e2033f7e and r3, r3, #504 ; 0x1f8
Align VLA size.
80080038: e1a0500d mov r5, sp
Save SP to recover it when VLA becomes needless.
8008003c: e04dd003 sub sp, sp, r3
Allocate R3 bytes on stack.
80080040: e1a0300d mov r3, sp
Store VLA address in R3.
80080044: e1a0c1a3 lsr ip, r3, #3 80080048: e1a0218c lsl r2, ip, #3
Here VLA address is aligned by 8 bytes.
If SP is either 0xYYYYYYY4 or 0xZZZZZZZC, r2 will lose significant digit and will become 0xYYYYYYY0/0xZZZZZZZ8 (VLA=SP-4). It will less than SP, so the next 'push' (alias to STMDB) will decrement SP by 4 and will store register at the top of the stack, so this will overwrite first 4 bytes of VLA.
On 06/15/2010 10:18 PM, Vitaly Kuzmichev wrote:
The ARM ABI requires that the stack be aligned to 8 bytes as it is noted in Procedure Call Standard for the ARM Architecture: http://infocenter.arm.com/help/topic/com.arm.doc.ihi0042d/index.html
Unaligned SP also causes the problem with variable-length arrays allocation when VLA address becomes less than stack pointer during aligning of this address, so the next 'push' in the stack overwrites first 4 bytes of VLA.
Signed-off-by: Vitaly Kuzmichev vkuzmichev@mvista.com