
17 May
2007
17 May
'07
1:11 a.m.
Leonid wrote:
As a matter of fact, such scheme is widely used for Xilinx FPGA embedded cores (both Microblaze and PPC) as well as for ARM CPUs.
Can you give me some details as to how this works? I'm trying to figure out if this approach is meaningful for boards based on Freescale 8xxx CPUs. I'm guessing it's not, and that the code I see in the board header files is some left-over legacy from a completely different CPU that no one ever bothered to think about.
--
Timur Tabi
Linux Kernel Developer @ Freescale